static uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
-static reg_t arm11_gdb_dummy_fp_reg =
+static struct reg arm11_gdb_dummy_fp_reg =
{
"GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
};
static uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
-static reg_t arm11_gdb_dummy_fps_reg =
+static struct reg arm11_gdb_dummy_fps_reg =
{
"GDB dummy floating-point status register", arm11_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
};
static int arm11_on_enter_debug_state(struct arm11_common *arm11);
-static int arm11_step(struct target_s *target, int current,
+static int arm11_step(struct target *target, int current,
uint32_t address, int handle_breakpoints);
/* helpers */
-static int arm11_build_reg_cache(target_t *target);
-static int arm11_set_reg(reg_t *reg, uint8_t *buf);
-static int arm11_get_reg(reg_t *reg);
+static int arm11_build_reg_cache(struct target *target);
+static int arm11_set_reg(struct reg *reg, uint8_t *buf);
+static int arm11_get_reg(struct reg *reg);
static void arm11_record_register_history(struct arm11_common * arm11);
static void arm11_dump_reg_changes(struct arm11_common * arm11);
/* poll current target status */
-static int arm11_poll(struct target_s *target)
+static int arm11_poll(struct target *target)
{
FNC_INFO;
int retval;
return ERROR_OK;
}
/* architecture specific status reply */
-static int arm11_arch_state(struct target_s *target)
+static int arm11_arch_state(struct target *target)
{
struct arm11_common * arm11 = target->arch_info;
}
/* target request support */
-static int arm11_target_request_data(struct target_s *target,
+static int arm11_target_request_data(struct target *target,
uint32_t size, uint8_t *buffer)
{
FNC_INFO_NOTIMPLEMENTED;
}
/* target execution control */
-static int arm11_halt(struct target_s *target)
+static int arm11_halt(struct target *target)
{
FNC_INFO;
return ERROR_OK;
}
-static int arm11_resume(struct target_s *target, int current,
+static int arm11_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
{
FNC_INFO;
{
/* check if one matches PC and step over it if necessary */
- breakpoint_t * bp;
+ struct breakpoint * bp;
for (bp = target->breakpoints; bp; bp = bp->next)
{
for (bp = target->breakpoints; bp; bp = bp->next)
{
- arm11_sc7_action_t brp[2];
+ struct arm11_sc7_action brp[2];
brp[0].write = 1;
brp[0].address = ARM11_SC7_BVR0 + brp_num;
return ARMV4_5_MODE_USR;
}
-static int arm11_simulate_step(target_t *target, uint32_t *dry_run_pc)
+static int arm11_simulate_step(struct target *target, uint32_t *dry_run_pc)
{
struct arm_sim_interface sim;
}
-static int arm11_step(struct target_s *target, int current,
+static int arm11_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
{
FNC_INFO;
/* Set up breakpoint for stepping */
- arm11_sc7_action_t brp[2];
+ struct arm11_sc7_action brp[2];
brp[0].write = 1;
brp[0].address = ARM11_SC7_BVR0;
return ERROR_OK;
}
-static int arm11_assert_reset(target_t *target)
+static int arm11_assert_reset(struct target *target)
{
FNC_INFO;
int retval;
return ERROR_OK;
}
-static int arm11_deassert_reset(target_t *target)
+static int arm11_deassert_reset(struct target *target)
{
return ERROR_OK;
}
-static int arm11_soft_reset_halt(struct target_s *target)
+static int arm11_soft_reset_halt(struct target *target)
{
FNC_INFO_NOTIMPLEMENTED;
}
/* target register access for gdb */
-static int arm11_get_gdb_reg_list(struct target_s *target,
- struct reg_s **reg_list[], int *reg_list_size)
+static int arm11_get_gdb_reg_list(struct target *target,
+ struct reg **reg_list[], int *reg_list_size)
{
FNC_INFO;
struct arm11_common * arm11 = target->arch_info;
*reg_list_size = ARM11_GDB_REGISTER_COUNT;
- *reg_list = malloc(sizeof(reg_t*) * ARM11_GDB_REGISTER_COUNT);
+ *reg_list = malloc(sizeof(struct reg*) * ARM11_GDB_REGISTER_COUNT);
for (size_t i = 16; i < 24; i++)
{
* to read/write a range of data to a "port". a "port" is an action on
* read memory address for some peripheral.
*/
-static int arm11_read_memory_inner(struct target_s *target,
+static int arm11_read_memory_inner(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer,
bool arm11_config_memrw_no_increment)
{
return arm11_run_instr_data_finish(arm11);
}
-static int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int arm11_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
return arm11_read_memory_inner(target, address, size, count, buffer, false);
}
* to read/write a range of data to a "port". a "port" is an action on
* read memory address for some peripheral.
*/
-static int arm11_write_memory_inner(struct target_s *target,
+static int arm11_write_memory_inner(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer,
bool arm11_config_memrw_no_increment)
{
return arm11_run_instr_data_finish(arm11);
}
-static int arm11_write_memory(struct target_s *target,
+static int arm11_write_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
return arm11_write_memory_inner(target, address, size, count, buffer, false);
}
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-static int arm11_bulk_write_memory(struct target_s *target,
+static int arm11_bulk_write_memory(struct target *target,
uint32_t address, uint32_t count, uint8_t *buffer)
{
FNC_INFO;
* fallback code will read data from the target and calculate the CRC on the
* host.
*/
-static int arm11_checksum_memory(struct target_s *target,
+static int arm11_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t* checksum)
{
return ERROR_FAIL;
/* target break-/watchpoint control
* rw: 0 = write, 1 = read, 2 = access
*/
-static int arm11_add_breakpoint(struct target_s *target,
- breakpoint_t *breakpoint)
+static int arm11_add_breakpoint(struct target *target,
+ struct breakpoint *breakpoint)
{
FNC_INFO;
return ERROR_OK;
}
-static int arm11_remove_breakpoint(struct target_s *target,
- breakpoint_t *breakpoint)
+static int arm11_remove_breakpoint(struct target *target,
+ struct breakpoint *breakpoint)
{
FNC_INFO;
return ERROR_OK;
}
-static int arm11_add_watchpoint(struct target_s *target,
- watchpoint_t *watchpoint)
+static int arm11_add_watchpoint(struct target *target,
+ struct watchpoint *watchpoint)
{
FNC_INFO_NOTIMPLEMENTED;
return ERROR_OK;
}
-static int arm11_remove_watchpoint(struct target_s *target,
- watchpoint_t *watchpoint)
+static int arm11_remove_watchpoint(struct target *target,
+ struct watchpoint *watchpoint)
{
FNC_INFO_NOTIMPLEMENTED;
// HACKHACKHACK - FIXME mode/state
/* target algorithm support */
-static int arm11_run_algorithm(struct target_s *target,
+static int arm11_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
// Set register parameters
for (int i = 0; i < num_reg_params; i++)
{
- reg_t *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
+ struct reg *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
{
if (reg_params[i].direction != PARAM_OUT)
{
- reg_t *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
+ struct reg *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return retval;
}
-static int arm11_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm11_target_create(struct target *target, Jim_Interp *interp)
{
FNC_INFO;
}
static int arm11_init_target(struct command_context_s *cmd_ctx,
- struct target_s *target)
+ struct target *target)
{
/* Initialize anything we can set up without talking to the target */
return arm11_build_reg_cache(target);
}
/* talk to the target and set things up */
-static int arm11_examine(struct target_s *target)
+static int arm11_examine(struct target *target)
{
int retval;
/** Load a register that is marked !valid in the register cache */
-static int arm11_get_reg(reg_t *reg)
+static int arm11_get_reg(struct reg *reg)
{
FNC_INFO;
- target_t * target = ((arm11_reg_state_t *)reg->arch_info)->target;
+ struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
if (target->state != TARGET_HALTED)
{
#if 0
struct arm11_common *arm11 = target->arch_info;
- const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((arm11_reg_state_t *)reg->arch_info)->def_index;
+ const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
#endif
return ERROR_OK;
}
/** Change a value in the register cache */
-static int arm11_set_reg(reg_t *reg, uint8_t *buf)
+static int arm11_set_reg(struct reg *reg, uint8_t *buf)
{
FNC_INFO;
- target_t * target = ((arm11_reg_state_t *)reg->arch_info)->target;
+ struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
struct arm11_common *arm11 = target->arch_info;
-// const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((arm11_reg_state_t *)reg->arch_info)->def_index;
+// const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
- arm11->reg_values[((arm11_reg_state_t *)reg->arch_info)->def_index] = buf_get_u32(buf, 0, 32);
+ arm11->reg_values[((struct arm11_reg_state *)reg->arch_info)->def_index] = buf_get_u32(buf, 0, 32);
reg->valid = 1;
reg->dirty = 1;
return ERROR_OK;
}
-static int arm11_build_reg_cache(target_t *target)
+static int arm11_build_reg_cache(struct target *target)
{
struct arm11_common *arm11 = target->arch_info;
- NEW(reg_cache_t, cache, 1);
- NEW(reg_t, reg_list, ARM11_REGCACHE_COUNT);
- NEW(arm11_reg_state_t, arm11_reg_states, ARM11_REGCACHE_COUNT);
+ NEW(struct reg_cache, cache, 1);
+ NEW(struct reg, reg_list, ARM11_REGCACHE_COUNT);
+ NEW(struct arm11_reg_state, arm11_reg_states, ARM11_REGCACHE_COUNT);
if (arm11_regs_arch_type == -1)
arm11_regs_arch_type = register_reg_arch_type(arm11_get_reg, arm11_set_reg);
cache->reg_list = reg_list;
cache->num_regs = ARM11_REGCACHE_COUNT;
- reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
+ struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
(*cache_p) = cache;
arm11->core_cache = cache;
for (i = 0; i < ARM11_REGCACHE_COUNT; i++)
{
- reg_t * r = reg_list + i;
+ struct reg * r = reg_list + i;
const struct arm11_reg_defs * rd = arm11_reg_defs + i;
- arm11_reg_state_t * rs = arm11_reg_states + i;
+ struct arm11_reg_state * rs = arm11_reg_states + i;
r->name = rd->name;
r->size = 32;
static struct arm11_common * arm11_find_target(const char * arg)
{
struct jtag_tap * tap;
- target_t * t;
+ struct target * t;
tap = jtag_tap_by_string(arg);
return 0;
}
-static int arm11_mrc_inner(target_t *target, int cpnum,
+static int arm11_mrc_inner(struct target *target, int cpnum,
uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm,
uint32_t *value, bool read)
{
return arm11_run_instr_data_finish(arm11);
}
-static int arm11_mrc(target_t *target, int cpnum,
+static int arm11_mrc(struct target *target, int cpnum,
uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
{
return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true);
}
-static int arm11_mcr(target_t *target, int cpnum,
+static int arm11_mcr(struct target *target, int cpnum,
uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
{
return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
#define ARM11_HANDLER(x) .x = arm11_##x
-target_type_t arm11_target = {
+struct target_type arm11_target = {
.name = "arm11",
ARM11_HANDLER(poll),
projects / fw / openocd / blobdiff