arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
- scan_field_t chain5_fields[3];
+ struct scan_field chain5_fields[3];
arm11_setup_field(arm11, 32, NULL, &R(WDTR), chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1);
arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT);
- scan_field_t chain5_fields[3];
+ struct scan_field chain5_fields[3];
uint8_t Ready = 0; /* ignored */
uint8_t Valid = 0; /* ignored */
arm11_add_IR(arm11, ARM11_IDCODE, ARM11_TAP_DEFAULT);
- scan_field_t idcode_field;
+ struct scan_field idcode_field;
arm11_setup_field(arm11, 32, NULL, &arm11->device_id, &idcode_field);
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
- scan_field_t chain0_fields[2];
+ struct scan_field chain0_fields[2];
arm11_setup_field(arm11, 32, NULL, &arm11->didr, chain0_fields + 0);
arm11_setup_field(arm11, 8, NULL, &arm11->implementor, chain0_fields + 1);
return ERROR_OK;
}
-static int arm11_handle_bool(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc, bool * var, char * name)
+static COMMAND_HELPER(arm11_handle_bool, bool *var, char *name)
{
if (argc == 0)
{
}
#define BOOL_WRAPPER(name, print_name) \
-static int arm11_handle_bool_##name(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) \
+COMMAND_HANDLER(arm11_handle_bool_##name) \
{ \
- return arm11_handle_bool(cmd_ctx, cmd, args, argc, &arm11_config_##name, print_name); \
+ return CALL_COMMAND_HANDLER(arm11_handle_bool, \
+ &arm11_config_##name, print_name); \
}
BOOL_WRAPPER(memwrite_burst, "memory write burst mode")
BOOL_WRAPPER(step_irq_enable, "IRQs while stepping")
BOOL_WRAPPER(hardware_step, "hardware single step")
-static int arm11_handle_vcr(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(arm11_handle_vcr)
{
switch (argc) {
case 0:
static arm11_common_t * arm11_find_target(const char * arg)
{
- jtag_tap_t * tap;
+ struct jtag_tap * tap;
target_t * t;
tap = jtag_tap_by_string(arg);
return 0;
}
-static int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc, bool read)
-{
- int retval;
-
- if (argc != (read ? 6 : 7))
- {
- LOG_ERROR("Invalid number of arguments.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- arm11_common_t * arm11 = arm11_find_target(args[0]);
-
- if (!arm11)
- {
- LOG_ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (arm11->target->state != TARGET_HALTED)
- {
- LOG_WARNING("target was not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t values[6];
-
- for (size_t i = 0; i < (read ? 5 : 6); i++)
- {
- COMMAND_PARSE_NUMBER(u32, args[i + 1], values[i]);
-
- if (values[i] > arm11_coproc_instruction_limits[i])
- {
- LOG_ERROR("Parameter %ld out of bounds (%" PRId32 " max).",
- (long)(i + 2),
- arm11_coproc_instruction_limits[i]);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- uint32_t instr = 0xEE000010 |
- (values[0] << 8) |
- (values[1] << 21) |
- (values[2] << 16) |
- (values[3] << 0) |
- (values[4] << 5);
-
- if (read)
- instr |= 0x00100000;
-
- retval = arm11_run_instr_data_prepare(arm11);
- if (retval != ERROR_OK)
- return retval;
-
- if (read)
- {
- uint32_t result;
- retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08" PRIx32 " (%" PRId32 ")",
- (int)(values[0]),
- (int)(values[1]),
- (int)(values[2]),
- (int)(values[3]),
- (int)(values[4]), result, result);
- }
- else
- {
- retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, values[5]);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("MRC p%d, %d, R0 (#0x%08" PRIx32 "), c%d, c%d, %d",
- (int)(values[0]), (int)(values[1]),
- values[5],
- (int)(values[2]), (int)(values[3]), (int)(values[4]));
- }
-
- return arm11_run_instr_data_finish(arm11);
-}
-
-static int arm11_handle_mrc(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
-{
- return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, true);
-}
-
-static int arm11_handle_mcr(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
-{
- return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
-}
-
static int arm11_mrc_inner(target_t *target, int cpnum,
uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm,
uint32_t *value, bool read)
return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
}
+static COMMAND_HELPER(arm11_handle_etm_read_write, bool read)
+{
+ if (argc != (read ? 2 : 3))
+ {
+ LOG_ERROR("Invalid number of arguments.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ arm11_common_t * arm11 = arm11_find_target(args[0]);
+
+ if (!arm11)
+ {
+ LOG_ERROR("Parameter 1 is not the target name of an ARM11 device.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ uint32_t address;
+ COMMAND_PARSE_NUMBER(u32, args[1], address);
+
+ if (!read)
+ {
+ uint32_t value;
+ COMMAND_PARSE_NUMBER(u32, args[2], value);
+
+ LOG_INFO("ETM write register 0x%02" PRIx32 " (%" PRId32 ") = 0x%08" PRIx32 " (%" PRId32 ")",
+ address, address, value, value);
+
+ CHECK_RETVAL(arm11_write_etm(arm11, address, value));
+ }
+ else
+ {
+ uint32_t value;
+
+ CHECK_RETVAL(arm11_read_etm(arm11, address, &value));
+
+ LOG_INFO("ETM read register 0x%02" PRIx32 " (%" PRId32 ") = 0x%08" PRIx32 " (%" PRId32 ")",
+ address, address, value, value);
+ }
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(arm11_handle_etmr)
+{
+ return CALL_COMMAND_HANDLER(arm11_handle_etm_read_write, true);
+}
+
+COMMAND_HANDLER(arm11_handle_etmw)
+{
+ return CALL_COMMAND_HANDLER(arm11_handle_etm_read_write, false);
+}
+
#define ARM11_HANDLER(x) .x = arm11_##x
target_type_t arm11_target = {
top_cmd = register_command(cmd_ctx, NULL, "arm11",
NULL, COMMAND_ANY, NULL);
+ register_command(cmd_ctx, top_cmd, "etmr",
+ arm11_handle_etmr, COMMAND_ANY,
+ "Read Embedded Trace Macrocell (ETM) register. etmr <jtag_target> <ETM register address>");
+
+ register_command(cmd_ctx, top_cmd, "etmw",
+ arm11_handle_etmw, COMMAND_ANY,
+ "Write Embedded Trace Macrocell (ETM) register. etmr <jtag_target> <ETM register address> <value>");
+
/* "hardware_step" is only here to check if the default
* simulate + breakpoint implementation is broken.
* TEMPORARY! NOT DOCUMENTED!
"DEBUG ONLY - Hardware single stepping"
" (default: disabled)");
- register_command(cmd_ctx, top_cmd, "mcr",
- arm11_handle_mcr, COMMAND_ANY,
- "Write Coprocessor register. mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write>. All parameters are numbers only.");
-
mw_cmd = register_command(cmd_ctx, top_cmd, "memwrite",
NULL, COMMAND_ANY, NULL);
register_command(cmd_ctx, mw_cmd, "burst",
"Terminate program if transfer error was found"
" (default: enabled)");
- register_command(cmd_ctx, top_cmd, "mrc",
- arm11_handle_mrc, COMMAND_ANY,
- "Read Coprocessor register. mrc <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2>. All parameters are numbers only.");
register_command(cmd_ctx, top_cmd, "step_irq_enable",
arm11_handle_bool_step_irq_enable, COMMAND_ANY,
"Enable interrupts while stepping"
projects / fw / openocd / blobdiff