mips: fix error handling for jtag_execute_queue()

[fw/openocd] / src / target / arm.h

diff --git a/src/target/arm.h b/src/target/arm.h
index c72b194267b0a8f12ddc3b9086b17d89288ed2bb..ce8cbe193e8bf2bfdd3d2e259668ec1b9b5bf0ec 100644 (file)
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -80,8 +80,6 @@ enum arm_state {
        ARM_STATE_THUMB_EE,
 };
 
-extern const char *arm_state_strings[];
-
 #define ARM_COMMON_MAGIC 0x0A450A45
 
 /**
@@ -95,6 +93,9 @@ struct arm {
        int common_magic;
        struct reg_cache *core_cache;
 
+       /** Handle to the PC; valid in all core modes. */
+       struct reg *pc;
+
        /** Handle to the CPSR; valid in all core modes. */
        struct reg *cpsr;
 
@@ -129,6 +130,8 @@ struct arm {
        /** Value to be returned by semihosting SYS_ERRNO request. */
        int semihosting_errno;
 
+       int (*setup_semihosting)(struct target *target, int enable);
+
        /** Backpointer to the target. */
        struct target *target;
 
@@ -162,6 +165,12 @@ struct arm {
                        uint32_t value);
 
        void *arch_info;
+
+       /** For targets conforming to ARM Debug Interface v5,
+        * this handle references the Debug Access Port (DAP)
+        * used to make requests to the target.
+        */
+       struct adiv5_dap *dap;
 };
 
 /** Convert target handle to generic ARM target state handle. */