struct arm_jtag *jtag_info = dap->jtag_info;
struct scan_field fields[2];
uint8_t out_addr_buf;
+ int retval;
- jtag_set_end_state(TAP_IDLE);
- arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
/* Scan out a read or write operation using some DP or AP register.
* For APACC access with any sticky error flag set, this is discarded.
jtag_add_runtest(dap->memaccess_tck,
TAP_IDLE);
- return jtag_get_error();
+ return ERROR_OK;
}
/**
/* Post CTRL/STAT read; discard any previous posted read value
* but collect its ACK status.
*/
- adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
return ERROR_JTAG_DEVICE_ERROR;
}
- adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = dap_run(dap)) != ERROR_OK)
return retval;
dap->ack = dap->ack & 0x7;
LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
/* Check power to debug regions */
if ((ctrlstat & 0xf0000000) != 0xf0000000)
- ahbap_debugport_init(dap);
+ {
+ retval = ahbap_debugport_init(dap);
+ if (retval != ERROR_OK)
+ return retval;
+ }
else
{
uint32_t mem_ap_csw, mem_ap_tar;
LOG_ERROR("JTAG-DP STICKY ERROR");
/* Clear Sticky Error Bits */
- adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_WRITE,
dap->dp_ctrl_stat | SSTICKYORUN
| SSTICKYERR, NULL);
- adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ if (retval != ERROR_OK)
+ return retval;
+ retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = dap_run(dap)) != ERROR_OK)
return retval;
struct scan_field fields[1];
/* This is a standard JTAG operation -- no DAP tweakage */
- jtag_set_end_state(TAP_IDLE);
retval = arm_jtag_set_instr(jtag_info, JTAG_DP_IDCODE, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
fields[0].in_value = (void *) data;
jtag_add_dr_scan(jtag_info->tap, 1, fields, TAP_IDLE);
- retval = jtag_get_error();
- if (retval != ERROR_OK)
- return retval;
jtag_add_callback(arm_le_to_h_u32,
(jtag_callback_data_t) data);
- return retval;
+ return ERROR_OK;
}
static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
/** Select the AP register bank matching bits 7:4 of reg. */
static int jtag_ap_q_bankselect(struct adiv5_dap *dap, unsigned reg)
{
- uint32_t select = reg & 0x000000F0;
+ uint32_t select_ap_bank = reg & 0x000000F0;
- if (select == dap->ap_bank_value)
+ if (select_ap_bank == dap->ap_bank_value)
return ERROR_OK;
- dap->ap_bank_value = select;
+ dap->ap_bank_value = select_ap_bank;
- select |= dap->apsel;
+ select_ap_bank |= dap->apsel;
- return jtag_dp_q_write(dap, DP_SELECT, select);
+ return jtag_dp_q_write(dap, DP_SELECT, select_ap_bank);
}
static int jtag_ap_q_read(struct adiv5_dap *dap, unsigned reg,
};
-const uint8_t swd2jtag_bitseq[] = {
+static const uint8_t swd2jtag_bitseq[] = {
/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
* putting both JTAG and SWD logic into reset state.
*/