flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / src / target / Makefile.am

diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 1d30747b6b56c3b8897e89b035c2daeb4fdd20af..46870922af02ddb768bba050c3c6edf4d474503b 100644 (file)
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -1,11 +1,9 @@
-if OOCD_TRACE
-OOCD_TRACE_FILES = %D%/oocd_trace.c
-else
-OOCD_TRACE_FILES =
-endif
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \
-       %D%/riscv/libriscv.la
+       %D%/riscv/libriscv.la \
+       %D%/xtensa/libxtensa.la \
+       %D%/espressif/libespressif.la
 
 %C%_libtarget_la_CPPFLAGS = $(AM_CPPFLAGS)
 
@@ -111,8 +109,8 @@ ARM_DEBUG_SRC = \
        %D%/trace.c \
        %D%/etb.c \
        %D%/etm.c \
-       $(OOCD_TRACE_FILES) \
        %D%/etm_dummy.c \
+       %D%/arm_tpiu_swo.c \
        %D%/arm_cti.c
 
 AVR32_SRC = \
@@ -171,6 +169,7 @@ ARC_SRC = \
 %C%_libtarget_la_SOURCES += \
        %D%/algorithm.h \
        %D%/arm.h \
+       %D%/arm_coresight.h \
        %D%/arm_dpm.h \
        %D%/arm_jtag.h \
        %D%/arm_adi_v5.h \
@@ -214,6 +213,7 @@ ARC_SRC = \
        %D%/etb.h \
        %D%/etm.h \
        %D%/etm_dummy.h \
+       %D%/arm_tpiu_swo.h \
        %D%/image.h \
        %D%/mips32.h \
        %D%/mips64.h \
@@ -223,7 +223,6 @@ ARC_SRC = \
        %D%/mips32_pracc.h \
        %D%/mips32_dmaacc.h \
        %D%/mips64_pracc.h \
-       %D%/oocd_trace.h \
        %D%/register.h \
        %D%/target.h \
        %D%/target_type.h \
@@ -265,3 +264,5 @@ ARC_SRC = \
 
 include %D%/openrisc/Makefile.am
 include %D%/riscv/Makefile.am
+include %D%/xtensa/Makefile.am
+include %D%/espressif/Makefile.am
\ No newline at end of file