+include $(top_srcdir)/common.mk
if OOCD_TRACE
OOCD_TRACE_FILES = oocd_trace.c
OOCD_TRACE_FILES =
endif
-AM_CPPFLAGS = \
- -I$(top_srcdir)/src
-
BIN2C = $(top_builddir)/src/helper/bin2char$(EXEEXT_FOR_BUILD)
DEBUG_HANDLER = $(srcdir)/xscale/debug_handler.bin
$(ARMV6_SRC) \
$(ARMV7_SRC) \
$(ARM_MISC_SRC) \
+ $(AVR32_SRC) \
$(MIPS32_SRC) \
- avrt.c
+ avrt.c \
+ dsp563xx.c \
+ dsp563xx_once.c
TARGET_CORE_SRC = \
algorithm.c \
breakpoints.c \
target.c \
target_request.c \
- testee.c
+ testee.c \
+ smp.c
ARMV4_5_SRC = \
armv4_5.c \
arm9tdmi.c \
arm920t.c \
arm966e.c \
+ arm946e.c \
arm926ejs.c \
feroceon.c
armv7m.c \
cortex_m3.c \
armv7a.c \
- cortex_a8.c
+ cortex_a.c
ARM_DEBUG_SRC = \
arm_dpm.c \
arm_simulator.c \
arm_semihosting.c \
arm_adi_v5.c \
+ adi_v5_jtag.c \
+ adi_v5_swd.c \
embeddedice.c \
trace.c \
etb.c \
$(OOCD_TRACE_FILES) \
etm_dummy.c
+AVR32_SRC = \
+ avr32_ap7k.c \
+ avr32_jtag.c \
+ avr32_mem.c \
+ avr32_regs.c
+
MIPS32_SRC = \
mips32.c \
mips_m4k.c \
noinst_HEADERS = \
algorithm.h \
+ arm.h \
arm_dpm.h \
arm_jtag.h \
arm_adi_v5.h \
arm_disassembler.h \
+ arm_opcodes.h \
arm_simulator.h \
arm_semihosting.h \
arm7_9_common.h \
arm920t.h \
arm926ejs.h \
arm966e.h \
+ arm946e.h \
arm11.h \
arm11_dbgtap.h \
armv4_5.h \
armv7a.h \
armv7m.h \
avrt.h \
+ dsp563xx.h \
+ dsp563xx_once.h \
breakpoints.h \
cortex_m3.h \
- cortex_a8.h \
+ cortex_a.h \
embeddedice.h \
etb.h \
etm.h \