/* PCLK is set to 16MHz (HCLK 32MHz, APB prescaler 2) */
-#define AO_SPI_SPEED_8MHz STM_SPI_CR1_BR_PCLK_2
-#define AO_SPI_SPEED_4MHz STM_SPI_CR1_BR_PCLK_4
-#define AO_SPI_SPEED_2MHz STM_SPI_CR1_BR_PCLK_8
-#define AO_SPI_SPEED_1MHz STM_SPI_CR1_BR_PCLK_16
-#define AO_SPI_SPEED_500kHz STM_SPI_CR1_BR_PCLK_32
-#define AO_SPI_SPEED_250kHz STM_SPI_CR1_BR_PCLK_64
-#define AO_SPI_SPEED_125kHz STM_SPI_CR1_BR_PCLK_128
-#define AO_SPI_SPEED_62500Hz STM_SPI_CR1_BR_PCLK_256
-
-#define AO_SPI_SPEED_FAST AO_SPI_SPEED_8MHz
+#define _AO_SPI_SPEED_8MHz STM_SPI_CR1_BR_PCLK_2
+#define _AO_SPI_SPEED_4MHz STM_SPI_CR1_BR_PCLK_4
+#define _AO_SPI_SPEED_2MHz STM_SPI_CR1_BR_PCLK_8
+#define _AO_SPI_SPEED_1MHz STM_SPI_CR1_BR_PCLK_16
+#define _AO_SPI_SPEED_500kHz STM_SPI_CR1_BR_PCLK_32
+#define _AO_SPI_SPEED_250kHz STM_SPI_CR1_BR_PCLK_64
+#define _AO_SPI_SPEED_125kHz STM_SPI_CR1_BR_PCLK_128
+#define _AO_SPI_SPEED_62500Hz STM_SPI_CR1_BR_PCLK_256
/* Companion bus wants something no faster than 200kHz */
-#define AO_SPI_SPEED_200kHz AO_SPI_SPEED_125kHz
+static inline uint32_t
+ao_spi_speed(uint32_t hz)
+{
+ if (hz >= 4000000) return _AO_SPI_SPEED_4MHz;
+ if (hz >= 2000000) return _AO_SPI_SPEED_2MHz;
+ if (hz >= 1000000) return _AO_SPI_SPEED_1MHz;
+ if (hz >= 500000) return _AO_SPI_SPEED_500kHz;
+ if (hz >= 250000) return _AO_SPI_SPEED_250kHz;
+ if (hz >= 125000) return _AO_SPI_SPEED_125kHz;
+ return _AO_SPI_SPEED_62500Hz;
+}
#define AO_SPI_CPOL_BIT 4
#define AO_SPI_CPHA_BIT 5
#define AO_SPI_CONFIG_1 0x00
#define AO_SPI_1_CONFIG_PA5_PA6_PA7 AO_SPI_CONFIG_1
-#define AO_SPI_2_CONFIG_PB13_PB14_PB15 AO_SPI_CONFIG_1
#define AO_SPI_CONFIG_2 0x04
-#define AO_SPI_1_CONFIG_PB3_PB4_PB5 AO_SPI_CONFIG_2
+#define AO_SPI_1_CONFIG_PA12_PA13_PA14 AO_SPI_CONFIG_2
#define AO_SPI_2_CONFIG_PD1_PD3_PD4 AO_SPI_CONFIG_2
#define AO_SPI_CONFIG_3 0x08
-#define AO_SPI_1_CONFIG_PE13_PE14_PE15 AO_SPI_CONFIG_3
+#define AO_SPI_1_CONFIG_PB3_PB4_PB5 AO_SPI_CONFIG_3
#define AO_SPI_CONFIG_NONE 0x0c
#define AO_SPI_CONFIG_MASK 0x0c
#define AO_SPI_1_PA5_PA6_PA7 (STM_SPI_INDEX(1) | AO_SPI_1_CONFIG_PA5_PA6_PA7)
+#define AO_SPI_1_PA12_PA13_PA14 (STM_SPI_INDEX(1) | AO_SPI_1_CONFIG_PA12_PA13_PA14)
#define AO_SPI_1_PB3_PB4_PB5 (STM_SPI_INDEX(1) | AO_SPI_1_CONFIG_PB3_PB4_PB5)
-#define AO_SPI_1_PE13_PE14_PE15 (STM_SPI_INDEX(1) | AO_SPI_1_CONFIG_PE13_PE14_PE15)
#define AO_SPI_2_PB13_PB14_PB15 (STM_SPI_INDEX(2) | AO_SPI_2_CONFIG_PB13_PB14_PB15)
#define AO_SPI_2_PD1_PD3_PD4 (STM_SPI_INDEX(2) | AO_SPI_2_CONFIG_PD1_PD3_PD4)
static inline void
ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
{
- struct stm_spi *stm_spi;
-
- switch (AO_SPI_INDEX(spi_index)) {
- case 0:
- stm_spi = &stm_spi1;
- break;
- case 1:
- stm_spi = &stm_spi2;
- break;
- }
+ struct stm_spi *stm_spi = &stm_spi1;
+ (void) spi_index;
while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)))
;
static inline uint8_t
ao_spi_recv_byte(uint8_t spi_index)
{
- struct stm_spi *stm_spi;
-
- switch (AO_SPI_INDEX(spi_index)) {
- case 0:
- stm_spi = &stm_spi1;
- break;
- case 1:
- stm_spi = &stm_spi2;
- break;
- }
+ struct stm_spi *stm_spi = &stm_spi1;
+ (void) spi_index;
while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)))
;
void
ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index);
-extern uint16_t ao_spi_speed[STM_NUM_SPI];
-
void
ao_spi_init(void);
ao_dma_done_transfer(uint8_t index);
void
-ao_dma_alloc(uint8_t index);
+ao_dma_alloc(uint8_t index, uint8_t cselr);
void
ao_dma_init(void);
#endif
};
+#include <ao_lpuart.h>
+
void
ao_debug_out(char c);
void start(void);
+bool
+ao_storage_device_is_erased(uint32_t pos);
+
#endif /* _AO_ARCH_FUNCS_H_ */