stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
} while (0)
+#define ao_disable_port(port) do { \
+ if ((port) == &stm_gpioa) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOAEN); \
+ else if ((port) == &stm_gpiob) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOBEN); \
+ else if ((port) == &stm_gpioc) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOCEN); \
+ else if ((port) == &stm_gpiod) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIODEN); \
+ else if ((port) == &stm_gpioe) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOEEN); \
+ } while (0)
+
#define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
stm_moder_set(port, bit, STM_MODER_OUTPUT);\
} while (0)
-#define ao_enable_input(port,bit,mode) do { \
- ao_enable_port(port); \
- stm_moder_set(port, bit, STM_MODER_INPUT); \
+#define ao_gpio_set_mode(port,bit,mode) do { \
if (mode == AO_EXTI_MODE_PULL_UP) \
stm_pupdr_set(port, bit, STM_PUPDR_PULL_UP); \
else if (mode == AO_EXTI_MODE_PULL_DOWN) \
else \
stm_pupdr_set(port, bit, STM_PUPDR_NONE); \
} while (0)
+
+#define ao_enable_input(port,bit,mode) do { \
+ ao_enable_port(port); \
+ stm_moder_set(port, bit, STM_MODER_INPUT); \
+ ao_gpio_set_mode(port, bit, mode); \
+ } while (0)
#define ao_enable_cs(port,bit) do { \
stm_gpio_set((port), bit, 1); \
asm("bx lr");
}
+#define HAS_ARCH_START_SCHEDULER 1
+
+static inline void ao_arch_start_scheduler(void) {
+ uint32_t sp;
+ uint32_t control;
+
+ asm("mrs %0,msp" : "=&r" (sp));
+ asm("msr psp,%0" : : "r" (sp));
+ asm("mrs %0,control" : "=&r" (control));
+ control |= (1 << 1);
+ asm("msr control,%0" : : "r" (control));
+}
+
#define ao_arch_isr_stack()
#define ao_arch_wait_interrupt() do { \