#include <ao.h>
#include <ao_data.h>
-#if HAS_MPU6000
-#include <ao_mpu6000.h>
-#endif
-#if HAS_MS5607
-#include <ao_ms5607.h>
-#endif
-
-volatile __xdata struct ao_data ao_data_ring[AO_DATA_RING];
-volatile __data uint8_t ao_data_head;
static uint8_t ao_adc_ready;
*/
static void ao_adc_done(int index)
{
- ao_data_ring[ao_data_head].tick = ao_time();
+ AO_DATA_PRESENT(AO_DATA_ADC);
+ ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
+ if (ao_data_present == AO_DATA_ALL) {
+#if HAS_MS5607
+ ao_data_ring[ao_data_head].ms5607_raw = ao_ms5607_current;
+#endif
+#if HAS_MMA655X
+ ao_data_ring[ao_data_head].mma655x = ao_mma655x_current;
+#endif
+#if HAS_HMC5883
+ ao_data_ring[ao_data_head].hmc5883 = ao_hmc5883_current;
+#endif
#if HAS_MPU6000
- ao_data_ring[ao_data_head].mpu6000 = ao_mpu6000_current;
+ ao_data_ring[ao_data_head].mpu6000 = ao_mpu6000_current;
#endif
-#if HAS_MS5607
- ao_data_ring[ao_data_head].ms5607 = ao_ms5607_current;
-#endif
- ao_data_head = ao_data_ring_next(ao_data_head);
- ao_wakeup((void *) &ao_data_head);
- ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
+ ao_data_ring[ao_data_head].tick = ao_tick_count;
+ ao_data_head = ao_data_ring_next(ao_data_head);
+ ao_wakeup((void *) &ao_data_head);
+ }
ao_adc_ready = 1;
}
stm_adc.sr = 0;
ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1),
&stm_adc.dr,
- (void *) (&ao_data_ring[ao_data_head].tick + 1),
+ (void *) (&ao_data_ring[ao_data_head].adc),
AO_NUM_ADC,
(0 << STM_DMA_CCR_MEM2MEM) |
(STM_DMA_CCR_PL_HIGH << STM_DMA_CCR_PL) |
void
ao_adc_get(__xdata struct ao_adc *packet)
{
+#if HAS_FLIGHT
+ uint8_t i = ao_data_ring_prev(ao_sample_data);
+#else
uint8_t i = ao_data_ring_prev(ao_data_head);
+#endif
memcpy(packet, (void *) &ao_data_ring[i].adc, sizeof (struct ao_adc));
}
-void
-ao_data_get(__xdata struct ao_data *packet)
-{
- uint8_t i = ao_data_ring_prev(ao_data_head);
- memcpy(packet, (void *) &ao_data_ring[i], sizeof (struct ao_data));
-}
-
static void
ao_adc_dump(void) __reentrant
{
#endif
#ifdef AO_ADC_PIN0_PORT
- stm_moder_set(&AO_ADC_PIN0_PORT, AO_ADC_PIN0_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN0_PORT, AO_ADC_PIN0_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN1_PORT
- stm_moder_set(&AO_ADC_PIN1_PORT, AO_ADC_PIN1_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN1_PORT, AO_ADC_PIN1_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN2_PORT
- stm_moder_set(&AO_ADC_PIN2_PORT, AO_ADC_PIN2_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN2_PORT, AO_ADC_PIN2_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN3_PORT
- stm_moder_set(&AO_ADC_PIN3_PORT, AO_ADC_PIN3_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN3_PORT, AO_ADC_PIN3_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN4_PORT
- stm_moder_set(&AO_ADC_PIN4_PORT, AO_ADC_PIN4_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN4_PORT, AO_ADC_PIN4_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN5_PORT
- stm_moder_set(&AO_ADC_PIN5_PORT, AO_ADC_PIN5_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN5_PORT, AO_ADC_PIN5_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN6_PORT
- stm_moder_set(&AO_ADC_PIN6_PORT, AO_ADC_PIN6_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN6_PORT, AO_ADC_PIN6_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN7_PORT
- stm_moder_set(&AO_ADC_PIN7_PORT, AO_ADC_PIN7_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN7_PORT, AO_ADC_PIN7_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN8_PORT
- stm_moder_set(&AO_ADC_PIN8_PORT, AO_ADC_PIN8_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN8_PORT, AO_ADC_PIN8_PIN, STM_MODER_ANALOG);
#endif
#ifdef AO_ADC_PIN9_PORT
- stm_moder_set(&AO_ADC_PIN9_PORT, AO_ADC_PIN9_PIN, STM_MODER_ANALOG);
+ stm_moder_set(AO_ADC_PIN9_PORT, AO_ADC_PIN9_PIN, STM_MODER_ANALOG);
+#endif
+#ifdef AO_ADC_PIN10_PORT
+ stm_moder_set(AO_ADC_PIN10_PORT, AO_ADC_PIN10_PIN, STM_MODER_ANALOG);
+#endif
+#ifdef AO_ADC_PIN11_PORT
+ stm_moder_set(AO_ADC_PIN11_PORT, AO_ADC_PIN11_PIN, STM_MODER_ANALOG);
+#endif
+#ifdef AO_ADC_PIN12_PORT
+ stm_moder_set(AO_ADC_PIN12_PORT, AO_ADC_PIN12_PIN, STM_MODER_ANALOG);
#endif
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_ADC1EN);
#if AO_NUM_ADC > 8
stm_adc.sqr4 |= (AO_ADC_SQ9 << 10);
#endif
-
+#if AO_NUM_ADC > 9
+ stm_adc.sqr4 |= (AO_ADC_SQ10 << 15);
+#endif
+#if AO_NUM_ADC > 10
+ stm_adc.sqr4 |= (AO_ADC_SQ11 << 20);
+#endif
+#if AO_NUM_ADC > 11
+ stm_adc.sqr4 |= (AO_ADC_SQ12 << 25);
+#endif
+#if AO_NUM_ADC > 12
+#error "need to finish stm_adc.sqr settings"
+#endif
+
/* Turn ADC on */
stm_adc.cr2 = AO_ADC_CR2_VAL;
#endif
/* Clear any stale status bits */
stm_adc.sr = 0;
- ao_adc_ready = 1;
ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
+
ao_cmd_register(&ao_adc_cmds[0]);
+
+ ao_adc_ready = 1;
}