Fixed flash utility for STM32F4

[fw/stlink] / src / stlink-usb.c

diff --git a/src/stlink-usb.c b/src/stlink-usb.c
index ff9ef71de7a4e6afc0b632342b473cc97826ff0b..63eddab3e792e204fb22f6ffe6c73fe4b435413a 100644 (file)
--- a/src/stlink-usb.c
+++ b/src/stlink-usb.c
@@ -586,19 +586,6 @@ stlink_t* stlink_open_usb(const int verbose) {
     
     sl->core_stat = STLINK_CORE_STAT_UNKNOWN;
 
-    /* flash memory settings */
-    sl->flash_base = STM32_FLASH_BASE;
-    sl->flash_size = STM32_FLASH_SIZE;
-    sl->flash_pgsz = STM32_FLASH_PGSZ;
-
-    /* system memory */
-    sl->sys_base = STM32_SYSTEM_BASE;
-    sl->sys_size = STM32_SYSTEM_SIZE;
-
-    /* sram memory settings */
-    sl->sram_base = STM32_SRAM_BASE;
-    sl->sram_size = STM32L_SRAM_SIZE;
-
     if (libusb_init(&(slu->libusb_ctx))) {
        fprintf(stderr, "failed to init libusb context, wrong version of libraries?\n");
        goto on_error;
@@ -693,11 +680,74 @@ stlink_t* stlink_open_usb(const int verbose) {
     slu->cmd_len = (slu->protocoll == 1)? STLINK_SG_SIZE: STLINK_CMD_SIZE;
 
     /* success */
+
     if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
-      printf("-- exit_dfu_mode\n");
       stlink_exit_dfu_mode(sl);
     }
+
+    if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
+      stlink_enter_swd_mode(sl);
+    }
+
     stlink_version(sl);
+
+    /* per device family initialization */
+    stlink_identify_device(sl);
+
+    if (sl->chip_id == STM32F4_CHIP_ID) {
+
+       /* flash memory settings */
+        sl->flash_base = STM32_FLASH_BASE;
+        sl->flash_size = STM32F4_FLASH_SIZE;
+        sl->flash_pgsz = STM32F4_FLASH_PGSZ;   //Dummy, pages size is variable in this config
+
+        /* system memory */
+        sl->sys_base = STM32_SYSTEM_BASE;
+        sl->sys_size = STM32_SYSTEM_SIZE;
+
+        /* sram memory settings */
+        sl->sram_base = STM32_SRAM_BASE;
+        sl->sram_size = STM32_SRAM_SIZE;
+
+      }
+
+    else if (sl->core_id == STM32L_CORE_ID) {
+
+      /* flash memory settings */
+      sl->flash_base = STM32_FLASH_BASE;
+      sl->flash_size = STM32_FLASH_SIZE;
+      sl->flash_pgsz = STM32L_FLASH_PGSZ;
+
+      /* system memory */
+      sl->sys_base = STM32_SYSTEM_BASE;
+      sl->sys_size = STM32_SYSTEM_SIZE;
+
+      /* sram memory settings */
+      sl->sram_base = STM32_SRAM_BASE;
+      sl->sram_size = STM32L_SRAM_SIZE;
+
+    }
+    else if (sl->core_id == STM32VL_CORE_ID) {
+
+      /* flash memory settings */
+      sl->flash_base = STM32_FLASH_BASE;
+      sl->flash_size = STM32_FLASH_SIZE;
+      sl->flash_pgsz = STM32_FLASH_PGSZ;
+
+      /* system memory */
+      sl->sys_base = STM32_SYSTEM_BASE;
+      sl->sys_size = STM32_SYSTEM_SIZE;
+
+      /* sram memory settings */
+      sl->sram_base = STM32_SRAM_BASE;
+      sl->sram_size = STM32_SRAM_SIZE;
+
+    }
+    else {
+      fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
+      goto on_libusb_error;
+    }
+
     error = 0;
 
 on_libusb_error: