[update] factorize flash writing code. use core_id to identify.

[fw/stlink] / src / stlink-usb.c

diff --git a/src/stlink-usb.c b/src/stlink-usb.c
index e7a9ba6428f85e4b949775810cadd198e58bca85..4fb3a1c3204d91dc81f9e67b5a75b89eaae4d439 100644 (file)
--- a/src/stlink-usb.c
+++ b/src/stlink-usb.c
@@ -680,15 +680,20 @@ stlink_t* stlink_open_usb(const int verbose) {
     slu->cmd_len = (slu->protocoll == 1)? STLINK_SG_SIZE: STLINK_CMD_SIZE;
 
     /* success */
+
     if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
-      printf("-- exit_dfu_mode\n");
       stlink_exit_dfu_mode(sl);
     }
+
+    if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
+      stlink_enter_swd_mode(sl);
+    }
+
     stlink_version(sl);
 
     /* per device family initialization */
     stlink_core_id(sl);
-    if (sl->core_id == 0x2ba01477) /* stm32l */ {
+    if (sl->core_id == STM32L_CORE_ID) {
 
       /* flash memory settings */
       sl->flash_base = STM32_FLASH_BASE;
@@ -703,7 +708,7 @@ stlink_t* stlink_open_usb(const int verbose) {
       sl->sram_base = STM32_SRAM_BASE;
       sl->sram_size = STM32L_SRAM_SIZE;
 
-    } else /* stm32vl */ {
+    } else if (sl->core_id == STM32VL_CORE_ID) {
 
       /* flash memory settings */
       sl->flash_base = STM32_FLASH_BASE;
@@ -718,6 +723,11 @@ stlink_t* stlink_open_usb(const int verbose) {
       sl->sram_base = STM32_SRAM_BASE;
       sl->sram_size = STM32_SRAM_SIZE;
 
+    } else {
+
+      fprintf(stderr, "unknown coreid: %x\n", sl->core_id);
+      goto on_libusb_error;
+
     }
 
     error = 0;