Merge pull request #320 from pavel-kirienko/master

[fw/stlink] / src / stlink-common.h

diff --git a/src/stlink-common.h b/src/stlink-common.h
index ac267e2bafa244ff9395a2b8681cd520eac24cc5..c3ac48d03ec4384cc0a8a6e9776119effb77878c 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -110,6 +110,7 @@ extern "C" {
 #define STM32_CHIPID_F4_HD          0x419
 #define STM32_CHIPID_F1_VL_MEDIUM_LOW 0x420
 
+#define STM32_CHIPID_F446           0x421
 #define STM32_CHIPID_F3             0x422
 #define STM32_CHIPID_F4_LP          0x423
 
@@ -117,6 +118,7 @@ extern "C" {
 
 #define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
 #define STM32_CHIPID_F1_VL_HIGH     0x428
+#define STM32_CHIPID_L1_CAT2        0x429
 
 #define STM32_CHIPID_F1_XL          0x430
 
@@ -264,6 +266,15 @@ extern "C" {
             .bootrom_base = 0x1ff00000,
             .bootrom_size = 0x1000
         },
+        {
+            .chip_id = STM32_CHIPID_L1_CAT2,
+            .description = "L1 Cat.2 device",
+            .flash_size_reg = 0x1ff8004c,
+            .flash_pagesize = 0x100,
+            .sram_size = 0x8000,
+            .bootrom_base = 0x1ff00000,
+            .bootrom_size = 0x1000
+        },
         {
             .chip_id = STM32_CHIPID_L1_MEDIUM_PLUS,
             .description = "L1 Medium-Plus-density device",
@@ -309,6 +320,16 @@ extern "C" {
             .bootrom_base = 0x1ffff000,
             .bootrom_size = 0x800
         },
+        {
+            // STM32F446x family. Support based on DM00135183.pdf (RM0390) document.
+            .chip_id = STM32_CHIPID_F446,
+            .description = "F446 device",
+            .flash_size_reg = 0x1fff7a22,
+            .flash_pagesize = 0x20000,
+            .sram_size = 0x20000,
+            .bootrom_base = 0x1fff0000,
+            .bootrom_size = 0x7800
+        },
         {
             // This is STK32F303VCT6 device from STM32 F3 Discovery board.
             // Support based on DM00043574.pdf (RM0316) document.