/* sram settings */
#define STM32_SRAM_BASE 0x20000000
#define STM32_SRAM_SIZE (8 * 1024)
+#define STM32L_SRAM_SIZE (16 * 1024)
stm32_addr_t sram_base;
size_t sram_size;
// unprocessed
int stlink_erase_flash_mass(stlink_t* sl);
int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, unsigned length);
+ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr);
// PUBLIC
uint16_t stlink_chip_id(stlink_t *sl);