Fix all compilation warnings

[fw/stlink] / src / stlink-common.h

diff --git a/src/stlink-common.h b/src/stlink-common.h
index 8b1be82c8b4d2bf83501ed24dfa65859066a89d5..579622892b38ccb4858a50636f454f0537003663 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -34,6 +34,7 @@ extern "C" {
 
 #define STLINK_GET_VERSION             0xf1
 #define STLINK_GET_CURRENT_MODE        0xf5
+#define STLINK_GET_TARGET_VOLTAGE      0xF7
 
 #define STLINK_DEBUG_COMMAND           0xF2
 #define STLINK_DFU_COMMAND             0xF3
@@ -102,10 +103,17 @@ extern "C" {
 #define STM32_CHIPID_F3 0x422
 #define STM32_CHIPID_F37x 0x432
 #define STM32_CHIPID_F4 0x413
+#define STM32_CHIPID_F4_HD 0x419
 #define STM32_CHIPID_F4_LP 0x423
 #define STM32_CHIPID_F1_HIGH 0x414
 #define STM32_CHIPID_L1_MEDIUM 0x416
-#define STM32_CHIPID_L1_MEDIUM_PLUS 0x436
+#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
+/*
+ * 0x436 is actually assigned to some L1 chips that are called "Medium-Plus"
+ * and some that are called "High".  0x427 is assigned to the other "Medium-
+ * plus" chips.  To make it a bit simpler we just call 427 MEDIUM_PLUS and
+ * 0x436 HIGH.
+ */
 #define STM32_CHIPID_L1_HIGH 0x436
 #define STM32_CHIPID_F1_CONN 0x418
 #define STM32_CHIPID_F1_VL_MEDIUM 0x420
@@ -153,7 +161,7 @@ static const chip_params_t devices[] = {
         {  // table 1, PM0059
             .chip_id = STM32_CHIPID_F2,
                     .description = "F2 device",
-                    .flash_size_reg = 0, /* no flash size reg found in the docs! */
+                    .flash_size_reg = 0x1ff7a22, /* RM0033 sind Rev 4*/
                     .flash_pagesize = 0x20000,
                     .sram_size = 0x20000,
                     .bootrom_base = 0x1fff0000,
@@ -171,7 +179,16 @@ static const chip_params_t devices[] = {
         {
             .chip_id = STM32_CHIPID_F4,
                     .description = "F4 device",
-                    .flash_size_reg = 0x1FFF7A10,  //RM0090 error same as unique ID
+                    .flash_size_reg = 0x1FFF7A22,  /* As in rm0090 since Rev 2*/
+                    .flash_pagesize = 0x4000,
+                    .sram_size = 0x30000,
+                    .bootrom_base = 0x1fff0000,
+                    .bootrom_size = 0x7800
+        },
+        {
+            .chip_id = STM32_CHIPID_F4_HD,
+                    .description = "F42x and F43x device",
+                    .flash_size_reg = 0x1FFF7A22,  /* As in rm0090 since Rev 2*/
                     .flash_pagesize = 0x4000,
                     .sram_size = 0x30000,
                     .bootrom_base = 0x1fff0000,
@@ -180,7 +197,7 @@ static const chip_params_t devices[] = {
         {
             .chip_id = STM32_CHIPID_F4_LP,
                     .description = "F4 device (low power)",
-                    .flash_size_reg = 0x1FFF7A10,
+                    .flash_size_reg = 0x1FFF7A22,
                     .flash_pagesize = 0x4000,
                     .sram_size = 0x10000,
                     .bootrom_base = 0x1fff0000,
@@ -209,12 +226,22 @@ static const chip_params_t devices[] = {
         {
             .chip_id = STM32_CHIPID_L1_MEDIUM_PLUS,
                     .description = "L1 Medium-Plus-density device",
-                    .flash_size_reg = 0x1ff800CC,
+                    .flash_size_reg = 0x1ff800cc,
                     .flash_pagesize = 0x100,
-                    .sram_size = 0x8000,
+                    .sram_size = 0x8000,/*Not completely clear if there are some with 48K*/
                     .bootrom_base = 0x1ff00000,
                     .bootrom_size = 0x1000
         },
+        {
+            .chip_id = STM32_CHIPID_L1_HIGH,
+                    .description = "L1 High-density device",
+                    .flash_size_reg = 0x1ff800cc,
+                    .flash_pagesize = 0x100,
+                    .sram_size = 0xC000, /*Not completely clear if there are some with 32K*/
+                    .bootrom_base = 0x1ff00000,
+                    .bootrom_size = 0x1000
+        },
+
         {
             .chip_id = STM32_CHIPID_F1_CONN,
                     .description = "F1 Connectivity line device",
@@ -370,6 +397,7 @@ static const chip_params_t devices[] = {
         void (*step) (stlink_t * stl);
         int (*current_mode) (stlink_t * stl);
         void (*force_debug) (stlink_t *sl);
+        int32_t (*target_voltage) (stlink_t *sl);
     } stlink_backend_t;
 
     struct _stlink {
@@ -439,6 +467,7 @@ static const chip_params_t devices[] = {
     void stlink_step(stlink_t *sl);
     int stlink_current_mode(stlink_t *sl);
     void stlink_force_debug(stlink_t *sl);
+    int stlink_target_voltage(stlink_t *sl);
 
 
     // unprocessed