add VCT6 support (chip_id 0x427) based on upstream patch by Burns

[fw/stlink] / src / stlink-common.h

diff --git a/src/stlink-common.h b/src/stlink-common.h
index 6fcb2194e10cc35fc9b63fcf1718983376ed4260..3c8dbf49da881b21654cb056848e2797ec36b3e6 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -100,6 +100,8 @@ extern "C" {
 #define STM32_CHIPID_F4 0x413
 #define STM32_CHIPID_F1_HIGH 0x414
 #define STM32_CHIPID_L1_MEDIUM 0x416
+#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
+#define STM32_CHIPID_L1_HIGH 0x436
 #define STM32_CHIPID_F1_CONN 0x418
 #define STM32_CHIPID_F1_VL_MEDIUM 0x420
 #define STM32_CHIPID_F1_VL_HIGH 0x428
@@ -204,6 +206,17 @@ extern "C" {
                     .bootrom_base = 0x1ffff000,
                     .bootrom_size = 0x800
         },
+        {
+          // This ignores the EEPROM! (and uses the page erase size,
+          // not the sector write protection...)
+            .chip_id = 0x427,
+                    .description = "L1 Med-density device plus",
+                    .flash_size_reg = 0x1ff800cc,
+                    .flash_pagesize = 0x100,
+                    .sram_size = 0x8000,
+                    .bootrom_base = 0x1ff00000,
+                    .bootrom_size = 0x1000
+        },
         {
             .chip_id = 0x428,
                     .description = "F1 High-density value line device",
@@ -221,7 +234,18 @@ extern "C" {
                     .sram_size = 0x18000,
                     .bootrom_base = 0x1fffe000,
                     .bootrom_size = 0x1800
-        }
+        },
+        {
+          // This ignores the EEPROM! (and uses the page erase size,
+          // not the sector write protection...)
+            .chip_id = 0x436,
+                    .description = "L1 High-density device",
+                    .flash_size_reg = 0x1ff8004c,
+                    .flash_pagesize = 0x100,
+                    .sram_size = 0xc000,
+                    .bootrom_base = 0x1ff00000,
+                    .bootrom_size = 0x1000
+        },
  };