[add] dac example

[fw/stlink] / src / stlink-common.h

diff --git a/src/stlink-common.h b/src/stlink-common.h
index 6110875fbc51dae132ebaedfe69c10e6196ec4ed..2fe04e188f3830ae0f3e5026955ae6b62318fcde 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -76,6 +76,11 @@ extern "C" {
 #define CM3_REG_FP_CTRL 0xE0002000
 #define CM3_REG_FP_COMP0 0xE0002008
 
+/* cortex core ids */
+#define STM32VL_CORE_ID 0x1ba01477
+#define STM32L_CORE_ID 0x2ba01477
+#define STM32F4_CORE_ID 0x2ba01477
+
 /* Enough space to hold both a V2 command or a V1 command packaged as generic scsi*/
 #define C_BUF_LEN 32
 
@@ -162,6 +167,7 @@ extern "C" {
 #define STM32_FLASH_BASE 0x08000000
 #define STM32_FLASH_SIZE (128 * 1024)
 #define STM32_FLASH_PGSZ 1024
+#define STM32L_FLASH_PGSZ 256
         stm32_addr_t flash_base;
         size_t flash_size;
         size_t flash_pgsz;
@@ -175,6 +181,7 @@ extern "C" {
         /* sram settings */
 #define STM32_SRAM_BASE 0x20000000
 #define STM32_SRAM_SIZE (8 * 1024)
+#define STM32L_SRAM_SIZE (16 * 1024)
         stm32_addr_t sram_base;
         size_t sram_size;
 
@@ -211,6 +218,7 @@ extern "C" {
     // unprocessed
     int stlink_erase_flash_mass(stlink_t* sl);
     int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, unsigned length);
+    int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr);
     
     // PUBLIC
     uint16_t stlink_chip_id(stlink_t *sl);