[update] blinky entrypoint

[fw/stlink] / src / stlink-common.h

diff --git a/src/stlink-common.h b/src/stlink-common.h
index a716f4d45b9b3d07b799bea26cca75e07ef20672..237aa66d5950b02cf6eae771b652cee2f7de7c76 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -71,6 +71,14 @@ extern "C" {
 #define STLINK_SWD_ENTER 0x30
 #define STLINK_SWD_READCOREID 0x32  // TBD
 
+// cortex m3 technical reference manual
+#define CM3_REG_CPUID 0xE000ED00
+#define CM3_REG_FP_CTRL 0xE0002000
+#define CM3_REG_FP_COMP0 0xE0002008
+
+/* Enough space to hold both a V2 command or a V1 command packaged as generic scsi*/
+#define C_BUF_LEN 32
+
     typedef struct {
         uint32_t r[16];
         uint32_t xpsr;
@@ -81,6 +89,13 @@ extern "C" {
     } reg;
 
     typedef uint32_t stm32_addr_t;
+    
+    typedef struct _cortex_m3_cpuid_ {
+        uint16_t implementer_id;
+        uint16_t variant;
+        uint16_t part;
+        uint8_t revision;
+    } cortex_m3_cpuid_t;
 
     typedef struct stlink_version_ {
         uint32_t stlink_v;
@@ -123,12 +138,15 @@ extern "C" {
         void (*write_reg) (stlink_t *sl, uint32_t reg, int idx);
         void (*step) (stlink_t * stl);
         int (*current_mode) (stlink_t * stl);
+        void (*force_debug) (stlink_t *sl);
     } stlink_backend_t;
 
     struct _stlink {
         struct _stlink_backend *backend;
         void *backend_data;
 
+        // Room for the command header
+        unsigned char c_buf[C_BUF_LEN];
         // Data transferred from or to device
         unsigned char q_buf[Q_BUF_LEN];
         int q_len;
@@ -174,7 +192,7 @@ extern "C" {
     void stlink_exit_debug_mode(stlink_t *sl);
     void stlink_exit_dfu_mode(stlink_t *sl);
     void stlink_close(stlink_t *sl);
-    void stlink_core_id(stlink_t *sl);
+    uint32_t stlink_core_id(stlink_t *sl);
     void stlink_reset(stlink_t *sl);
     void stlink_run(stlink_t *sl);
     void stlink_status(stlink_t *sl);
@@ -187,16 +205,16 @@ extern "C" {
     void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx);
     void stlink_step(stlink_t *sl);
     int stlink_current_mode(stlink_t *sl);
+    void stlink_force_debug(stlink_t *sl);
 
 
     // unprocessed
-    void stlink_force_debug(stlink_t *sl);
-
     int stlink_erase_flash_mass(stlink_t* sl);
     int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, unsigned length);
     
     // PUBLIC
     uint16_t stlink_chip_id(stlink_t *sl);
+    void stlink_cpu_id(stlink_t *sl, cortex_m3_cpuid_t *cpuid);
 
     // privates, publics, the rest....
     // TODO sort what is private, and what is not