void stlink_core_id(stlink_t *sl) {
D(sl, "\n*** stlink_core_id ***\n");
sl->backend->core_id(sl);
+ if (sl->verbose > 2)
+ stlink_print_data(sl);
DD(sl, "core_id = 0x%08x\n", sl->core_id);
}
sl->backend->write_mem8(sl, addr, len);
}
-void stlink_read_all_reg(stlink_t *sl) {
- D(sl, "\n*** stlink_read_all_reg ***\n");
- sl->backend->read_all_reg(sl);
+void stlink_read_all_regs(stlink_t *sl, reg *regp) {
+ D(sl, "\n*** stlink_read_all_regs ***\n");
+ sl->backend->read_all_regs(sl, regp);
}
void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx) {
int stlink_current_mode(stlink_t *sl) {
D(sl, "\n*** stlink_current_mode ***\n");
- sl->backend->current_mode(sl);
+ int mode = sl->backend->current_mode(sl);
+ stlink_print_data(sl);
+ switch (mode) {
+ case STLINK_DEV_DFU_MODE:
+ DD(sl, "stlink mode: dfu\n");
+ return mode;
+ case STLINK_DEV_DEBUG_MODE:
+ DD(sl, "stlink mode: debug (jtag or swd)\n");
+ return mode;
+ case STLINK_DEV_MASS_MODE:
+ DD(sl, "stlink mode: mass\n");
+ return mode;
+ }
+ DD(sl, "stlink mode: unknown!\n");
+ return STLINK_DEV_UNKNOWN_MODE;
}