Merge pull request #298 from giuseppebarba/master

[fw/stlink] / src / stlink-common.c

diff --git a/src/stlink-common.c b/src/stlink-common.c
index acc84169bacb9447f75d8f2959155459566b86f7..3256ccd8994336fd92d48c7cefaecd4ec6879527 100644 (file)
--- a/src/stlink-common.c
+++ b/src/stlink-common.c
@@ -478,6 +478,12 @@ int stlink_load_device_params(stlink_t *sl) {
     sl->sys_base = params->bootrom_base;
     sl->sys_size = params->bootrom_size;
 
+    //medium and low devices have the same chipid. ram size depends on flash size.
+    //STM32F100xx datasheet Doc ID 16455 Table 2
+    if(sl->chip_id == STM32_CHIPID_F1_VL_MEDIUM_LOW && sl->flash_size < 64 * 1024){
+        sl->sram_size = 0x1000;
+    }
+
     ILOG("Device connected is: %s, id %#x\n", params->description, chip_id);
     // TODO make note of variable page size here.....
     ILOG("SRAM size: %#x bytes (%d KiB), Flash: %#x bytes (%d KiB) in pages of %zd bytes\n",
@@ -1000,13 +1006,18 @@ int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, s
 }
 
 uint32_t calculate_F4_sectornum(uint32_t flashaddr){
+    uint32_t offset = 0;
     flashaddr &= ~STM32_FLASH_BASE;    //Page now holding the actual flash address
-    if (flashaddr<0x4000) return (0);
-    else if(flashaddr<0x8000) return(1);
-    else if(flashaddr<0xc000) return(2);
-    else if(flashaddr<0x10000) return(3);
-    else if(flashaddr<0x20000) return(4);
-    else return(flashaddr/0x20000)+4;
+    if (flashaddr >= 0x100000) {
+        offset = 12;
+        flashaddr -= 0x100000;
+    } 
+    if (flashaddr<0x4000) return (offset + 0);
+    else if(flashaddr<0x8000) return(offset + 1);
+    else if(flashaddr<0xc000) return(offset + 2);
+    else if(flashaddr<0x10000) return(offset + 3);
+    else if(flashaddr<0x20000) return(offset + 4);
+    else return offset + (flashaddr/0x20000) +4;
 
 }
 
@@ -1014,6 +1025,9 @@ uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr){
     if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) || (sl->chip_id == STM32_CHIPID_F4_DE) ||
             (sl->chip_id == STM32_CHIPID_F4_LP) || (sl->chip_id == STM32_CHIPID_F4_HD) || (sl->chip_id == STM32_CHIPID_F411RE)) {
         uint32_t sector=calculate_F4_sectornum(flashaddr);
+        if (sector>= 12) {
+            sector -= 12;
+        }
         if (sector<4) sl->flash_pgsz=0x4000;
         else if(sector<5) sl->flash_pgsz=0x10000;
         else sl->flash_pgsz=0x20000;
@@ -1042,6 +1056,10 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
         uint32_t sector=calculate_F4_sectornum(flashaddr);
 
         fprintf(stderr, "EraseFlash - Sector:0x%x Size:0x%x\n", sector, stlink_calculate_pagesize(sl, flashaddr));
+        
+        //the SNB values for flash sectors in the second bank do not directly follow the values for the first bank on 2mb devices...
+        if (sector >= 12) sector += 4;
+
         write_flash_cr_snb(sl, sector);
 
         /* start erase operation */
@@ -1367,7 +1385,7 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
             sl->chip_id == STM32_CHIPID_F4_LP || sl->chip_id == STM32_CHIPID_F4_HD || (sl->chip_id == STM32_CHIPID_F411RE)){
         loader_code = loader_code_stm32f4;
         loader_size = sizeof(loader_code_stm32f4);
-    } else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL) {
+    } else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F04 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL || sl->chip_id == STM32_CHIPID_F09X) {
         loader_code = loader_code_stm32f0;
         loader_size = sizeof(loader_code_stm32f0);
     } else if (sl->chip_id == STM32_CHIPID_L0) {