#define SPI_DEBUG 0
#define SPI_USE_DMA 1
-/*
- * DMA is only used for USARTs in altos, which makes assigning DMA IDs
- * pretty easy
- */
-
-#define MISO_DMA_ID(id) ((uint8_t) ((id) * 2U + 0U))
-#define MOSI_DMA_ID(id) ((uint8_t) ((id) * 2U + 1U))
-
struct ao_spi_samd21_info {
struct samd21_sercom *sercom;
};
/* read any stuck data */
(void) sercom->data;
- _ao_dma_start_transfer(MISO_DMA_ID(id),
+ _ao_dma_start_transfer(AO_SERCOM_INPUT_DMA_ID(id),
(void *) &sercom->data,
i,
len,
(void *) (uintptr_t) id
);
- _ao_dma_start_transfer(MOSI_DMA_ID(id),
+ _ao_dma_start_transfer(AO_SERCOM_OUTPUT_DMA_ID(id),
o,
(void *) &sercom->data,
len,
while (ao_spi_done[id] == 0)
ao_sleep(&ao_spi_done[id]);
- _ao_dma_done_transfer(MOSI_DMA_ID(id));
- _ao_dma_done_transfer(MISO_DMA_ID(id));
+ _ao_dma_done_transfer(AO_SERCOM_OUTPUT_DMA_ID(id));
+ _ao_dma_done_transfer(AO_SERCOM_INPUT_DMA_ID(id));
ao_arch_release_interrupts();
}
spi_run(block, &spi_dev_null, len, spi_index, true, false);
}
+void
+ao_spi_send_fixed(uint8_t data, uint16_t len, uint16_t spi_index)
+{
+ spi_run(&data, &spi_dev_null, len, spi_index, false, false);
+}
void
ao_spi_recv(void *block, uint16_t len, uint16_t spi_index)
samd21_port_pmux_clr(&samd21_port_a, 6); /* MISO */
break;
#endif
+#if HAS_SPI_3
+ case AO_SPI_PIN_CONFIG(AO_SPI_3_PA22_PA23_PA20):
+ samd21_port_pmux_clr(&samd21_port_a, 22); /* MOSI */
+ samd21_port_pmux_clr(&samd21_port_a, 23); /* SCLK */
+ samd21_port_pmux_clr(&samd21_port_a, 20); /* MISO */
+ break;
+#endif
+#if HAS_SPI_4
+ case AO_SPI_PIN_CONFIG(AO_SPI_4_PB10_PB11_PA12):
+ samd21_port_pmux_clr(&samd21_port_b, 10); /* MOSI */
+ samd21_port_pmux_clr(&samd21_port_b, 11); /* SCLK */
+ samd21_port_pmux_clr(&samd21_port_a, 12); /* MISO */
+ break;
+#endif
#if HAS_SPI_5
case AO_SPI_PIN_CONFIG(AO_SPI_5_PB22_PB23_PB03):
samd21_port_pmux_clr(&samd21_port_b, 22); /* MOSI */
ao_enable_output(&samd21_port_a, 5, 1);
ao_enable_input(&samd21_port_a, 6, AO_MODE_PULL_NONE);
- samd21_port_pmux_set(&samd21_port_a, 4, SAMD21_PORT_PMUX_FUNC_C); /* MOSI */
- samd21_port_pmux_set(&samd21_port_a, 5, SAMD21_PORT_PMUX_FUNC_C); /* SCLK */
- samd21_port_pmux_set(&samd21_port_a, 6, SAMD21_PORT_PMUX_FUNC_C); /* MISO */
+ samd21_port_pmux_set(&samd21_port_a, 4, SAMD21_PORT_PMUX_FUNC_D); /* MOSI */
+ samd21_port_pmux_set(&samd21_port_a, 5, SAMD21_PORT_PMUX_FUNC_D); /* SCLK */
+ samd21_port_pmux_set(&samd21_port_a, 6, SAMD21_PORT_PMUX_FUNC_D); /* MISO */
+ break;
+#endif
+#if HAS_SPI_3
+ case AO_SPI_PIN_CONFIG(AO_SPI_3_PA22_PA23_PA20):
+ ao_enable_output(&samd21_port_a, 22, 1);
+ ao_enable_output(&samd21_port_a, 23, 1);
+ ao_enable_input(&samd21_port_a, 20, AO_MODE_PULL_NONE);
+
+ samd21_port_pmux_set(&samd21_port_a, 22, SAMD21_PORT_PMUX_FUNC_C); /* MOSI */
+ samd21_port_pmux_set(&samd21_port_a, 23, SAMD21_PORT_PMUX_FUNC_C); /* SCLK */
+ samd21_port_pmux_set(&samd21_port_a, 20, SAMD21_PORT_PMUX_FUNC_D); /* MISO */
break;
#endif
#if HAS_SPI_4