* src/SDCC.y (pointer): fixed bug #846006

[fw/sdcc] / src / port.h

diff --git a/src/port.h b/src/port.h
index 5bb49e82de4a793bd769774eae319448cf152312..3f1745ec867db93432b90590d0a9ec883243375d 100644 (file)
--- a/src/port.h
+++ b/src/port.h
@@ -17,6 +17,7 @@
 #define TARGET_ID_PIC16           7
 #define TARGET_ID_XA51     9
 #define TARGET_ID_DS400           10
+#define TARGET_ID_HC08     11
 
 /* Macro to test the target we are compiling for.
    Can only be used after SDCCmain has defined the port
@@ -30,6 +31,7 @@
 #define TARGET_IS_PIC   (port->id==TARGET_ID_PIC)
 #define TARGET_IS_PIC16        (port->id==TARGET_ID_PIC16)
 #define TARGET_IS_XA51 (port->id==TARGET_ID_XA51)
+#define TARGET_IS_HC08 (port->id==TARGET_ID_HC08)
 
 #define MAX_BUILTIN_ARGS       16
 /* definition of builtin functions */
@@ -247,10 +249,25 @@ typedef struct
     */
     bool (*hasNativeMulFor) (iCode *ic, sym_link *left, sym_link *right);
 
+    /** Returns true if the port has implemented certain bit
+        manipulation iCodes (RRC, RLC, SWAP, GETHBIT)
+    */
+    bool (*hasExtBitOp) (int op, int size);
+    
+    /** Returns the relative expense of accessing a particular output
+        storage class. Larger values indicate higher expense.
+    */
+    int (*oclsExpense) (struct memmap *oclass);
+    
     /** If TRUE, then tprintf and !dw will be used for some initalisers
      */
     bool use_dw_for_init;
 
+    /** TRUE for targets with little endian byte ordering, FALSE for
+        targets with big endian byte ordering.
+     */
+    bool little_endian;
+
     /* condition transformations */
     bool lt_nge;               /* transform (a < b)  to !(a >= b)  */
     bool gt_nle;               /* transform (a > b)  to !(a <= b)  */
@@ -303,5 +320,8 @@ extern PORT xa51_port;
 #if !OPT_DISABLE_DS400
 extern PORT ds400_port;
 #endif
+#if !OPT_DISABLE_HC08
+extern PORT hc08_port;
+#endif
 
 #endif /* PORT_INCLUDE*/