dReg->isFree = 0;
dReg->wasUsed = 1;
-
-// dReg->isMapped = 0;
dReg->isEmitted = 0;
if(type == REG_SFR) {
dReg->reglives.assignedpFlows = newSet();
dReg->regop = refop;
- hTabAddItem(&dynDirectRegNames, regname2key(name), dReg);
+ if(!(type == REG_SFR && alias == 0x80))
+ hTabAddItem(&dynDirectRegNames, regname2key(name), dReg);
return dReg;
}
// fprintf(stderr,"%s:%d: %s %s addr =0x%x\n",__FILE__, __LINE__, __FUNCTION__, name, rIdx);
- if(reg) {
- reg->wasUsed = 0;
- return addSet(&pic16_dynInternalRegs,reg);
- }
+ if(reg) {
+ reg->wasUsed = 0;
+ return addSet(&pic16_dynInternalRegs,reg);
+ }
return NULL;
}
/* try to reuse some unused registers */
reg = regFindFree( pic16_dynAllocRegs );
+ if(reg) {
+// fprintf(stderr, "%s: found FREE register %s\n", __FILE__, reg->name);
+ }
+
if(!reg) {
reg = newReg(REG_GPR, PO_GPR_TEMP, dynrIdx++, NULL, 1, 0, NULL);
- addSet(&pic16_dynAllocRegs, reg);
+// addSet(&pic16_dynAllocRegs, reg);
}
+
+ addSet(&pic16_dynAllocRegs, reg);
+
reg->isFree=0;
// debugLog ("%s of type %s\n", __FUNCTION__, debugLogRegType (type));
reg->isLocal = 1; /* this is a local frame register */
}
- if (currFunc)
+ if (currFunc) {
+// fprintf(stderr, "%s:%d adding %s into function %s regsUsed\n", __FUNCTION__, __LINE__, reg->name, currFunc->name);
currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, reg->rIdx);
+ }
return (reg); // addSet(&pic16_dynAllocRegs,reg);
if(!IS_SYMOP(op)) {
debugLog ("%s BAD, op is NULL\n", __FUNCTION__);
+// fprintf(stderr, "%s BAD, op is NULL\n", __FUNCTION__);
return NULL;
}
name = OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name;
+ if(!SPEC_OCLS( OP_SYM_ETYPE(op))) { // patch 13
+ if(pic16_debug_verbose) //
+ { //
+ fprintf(stderr, "%s:%d symbol %s(r:%s) is not assigned to a memmap\n", __FILE__, __LINE__, //
+ OP_SYMBOL(op)->name, OP_SYMBOL(op)->rname); //
+ } //
+ return NULL; //
+ } // patch 13
+
debugLog ("%s symbol name %s\n", __FUNCTION__,name);
// fprintf(stderr, "%s symbol name %s\n", __FUNCTION__,name);
* dynDirectRegNames set */
if(IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) {
if(pic16_debug_verbose)
- fprintf(stderr, "%s:%d symbol %s in codespace\n", __FILE__, __LINE__,
- OP_SYMBOL(op)->name);
+// fprintf(stderr, "%s:%d symbol %s in codespace\n", __FILE__, __LINE__,
+// OP_SYMBOL(op)->name);
+ debugLog("%s:%d sym: %s in codespace\n", __FUNCTION__, __LINE__, OP_SYMBOL(op)->name);
return NULL;
}
if(!IS_CONFIG_ADDRESS(address)) {
// fprintf(stderr,"%s:allocating new reg %s\n",__FUNCTION__, name);
- if(SPEC_SCLS(OP_SYM_ETYPE(op)))regtype = REG_SFR;
-
+ /* this is an error, why added? -- VR */
+// if(SPEC_SCLS(OP_SYM_ETYPE(op)))regtype = REG_SFR;
+
+ if(OP_SYMBOL(op)->onStack) {
+// fprintf(stderr, "%s:%d onStack %s\n", __FILE__, __LINE__, OP_SYMBOL(op)->name);
+ OP_SYMBOL(op)->onStack = 0;
+ SPEC_OCLS(OP_SYM_ETYPE(op)) = data;
+ regtype = REG_GPR;
+ }
+
+ if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) { // patch 13
+ if(pic16_debug_verbose) //
+ { //
+ fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d\n",
+ IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))),
+ IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))),
+ IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))),
+ IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))),
+ IN_STACK( OP_SYM_ETYPE(op)));
+
+ fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, //
+ OP_SYMBOL(op)->name); //
+ } //
+// return NULL; //
+ } // patch 13
+
reg = newReg(regtype, PO_DIR, rDirectIdx++, name,getSize (OP_SYMBOL (op)->type),0, op);
debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size);
reg->isBitField = 1;
} else {
// fprintf(stderr, "%s:%d adding %s in direct registers\n", __FILE__, __LINE__, reg->name);
+// addSet(&pic16_dynDirectRegs, reg);
checkAddReg(&pic16_dynDirectRegs, reg);
}
if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) {
reg->isFixed = 1;
reg->address = SPEC_ADDR ( OP_SYM_ETYPE(op));
+
+ /* work around for user defined registers in access bank */
+ if((reg->address>= 0x00 && reg->address < 0x80)
+ || (reg->address >= 0xf80 && reg->address <= 0xfff))
+ reg->accessBank = 1;
+
debugLog (" -- and it is at a fixed address 0x%02x\n",reg->address);
}
reg = newReg(REG_GPR, PO_DIR, rDirectIdx++, name,size,0, NULL);
debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size);
- //fprintf(stderr, " -- added %s to hash, size = %d\n", name,reg->size);
+ //fprintf(stderr, " -- added %s to hash, size = %d\n", name,reg->size);
//hTabAddItem(&dynDirectRegNames, regname2key(name), reg); /* initially commented out */
addSet(&pic16_dynDirectRegs, reg);
regs *dReg;
debugLog ("%s - requesting index = 0x%x\n", __FUNCTION__,idx);
+// fprintf(stderr, "%s - requesting index = 0x%x\n", __FUNCTION__, idx);
switch (type) {
regs *dReg;
debugLog ("%s - allocating with index = 0x%x\n", __FUNCTION__,idx);
+// fprintf(stderr, "%s - allocating with index = 0x%x\n", __FUNCTION__,idx);
if( (dReg = regWithIdx ( pic16_dynAllocRegs, idx,0)) != NULL) {
//extern void pic16_dump_map(void);
extern void pic16_dump_section(FILE *of, set *section, int fix);
extern void pic16_dump_int_registers(FILE *of, set *section);
+extern void pic16_dump_idata(FILE *of, set *idataSymSet);
static void packBits(set *bregs)
{
/* dump equates */
pic16_dump_equates(of, pic16_equ_data);
-
+
+ /* dump initialised data */
+ pic16_dump_idata(of, idataSymSet);
+
/* dump internal registers */
pic16_dump_int_registers(of, pic16_int_regs);
/* dump other variables */
pic16_dump_section(of, pic16_rel_udata, 0);
pic16_dump_section(of, pic16_fix_udata, 1);
-
+
}
#if 0
(ic = hTabItemWithKey (iCodehTab,
bitVectFirstBit (sym->defs))) &&
POINTER_GET (ic) &&
- !sym->noSpilLoc &&
- !IS_BITVAR (sym->etype)) {
-
-
- debugLog (" %d - \n", __LINE__);
-
- /* if remat in data space */
- if (OP_SYMBOL (IC_LEFT (ic))->remat &&
- DCL_TYPE (aggrToPtr (sym->type, FALSE)) == POINTER) {
+ !IS_BITVAR (sym->etype) &&
+ (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) {
+ if (ptrPseudoSymSafe (sym, ic)) {
+
+ symbol *psym;
+
+ debugLog (" %d - \n", __LINE__);
+
/* create a psuedo symbol & force a spil */
//X symbol *psym = newSymbol (rematStr (OP_SYMBOL (IC_LEFT (ic))), 1);
- symbol *psym = rematStr (OP_SYMBOL (IC_LEFT (ic)));
+ psym = rematStr (OP_SYMBOL (IC_LEFT (ic)));
psym->type = sym->type;
psym->etype = sym->etype;
+ psym->psbase = ptrBaseRematSym (OP_SYMBOL (IC_LEFT (ic)));
strcpy (psym->rname, psym->name);
sym->isspilt = 1;
sym->usl.spillLoc = psym;
#else
if(IS_CODEPTR (sym->type)) {
#endif
- debugLog (" %d const pointer type requires %d registers, changing to 2\n",__LINE__,sym->nRegs);
- sym->nRegs = 2;
+ // what IS this ???? (HJD)
+ debugLog (" %d const pointer type requires %d registers, changing to 3\n",__LINE__,sym->nRegs); // patch 14
+ sym->nRegs = 3; // patch 14
}
if (sym->nRegs > 4) {
OP_SYMBOL (IC_RESULT (ic))->iaccess)
{
+#if 0
+ /* clear the onStack flag, the port doesn't support it yet! FIXME */
+ if(OP_SYMBOL(IC_RESULT(ic))->onStack)
+ OP_SYMBOL(IC_RESULT(ic))->onStack = 0;
+#endif
+
+
/* the operation has only one symbol
operator then we can pack */
if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) ||
}
+#if 1
+
+#define NO_packRegsForAccUse
+#define NO_packRegsForSupport
+#define NO_packRegsForOneuse
+#define NO_cast_peep
+
+#endif
+
+
+#ifndef NO_packRegsForSupport
/*-----------------------------------------------------------------*/
/* findAssignToSym : scanning backwards looks for first assig found */
/*-----------------------------------------------------------------*/
OP_SYMBOL (IC_RIGHT (dic))->onStack)
{
+#if 0
+ if(OP_SYMBOL(IC_RESULT(ic))->onStack)
+ OP_SYMBOL(IC_RESULT(ic))->onStack = 0;
+#endif
+
if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key &&
IC_LEFT (ic)->key != IC_RIGHT (dic)->key &&
IC_RIGHT (ic)->key != IC_RIGHT (dic)->key)
}
+#endif
+
+#ifndef NO_packRegsForSupport
/*-----------------------------------------------------------------*/
/* packRegsForSupport :- reduce some registers for support calls */
/*-----------------------------------------------------------------*/
return change;
}
+#endif
-#define IS_OP_RUONLY(x) (x && IS_SYMOP(x) && OP_SYMBOL(x)->ruonly)
+#define IS_OP_RUONLY(x) (x && IS_SYMOP(x) && OP_SYMBOL(x)->ruonly)
+#ifndef NO_packRegsForOneuse
/*-----------------------------------------------------------------*/
/* packRegsForOneuse : - will reduce some registers for single Use */
/*-----------------------------------------------------------------*/
return sic;
}
+#endif
+
/*-----------------------------------------------------------------*/
/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */
return FALSE;
}
+
+#ifndef NO_packRegsForAccUse
+
/*-----------------------------------------------------------------*/
/* packRegsForAccUse - pack registers for acc use */
/*-----------------------------------------------------------------*/
}
+#endif
+
/*-----------------------------------------------------------------*/
/* packForPush - hueristics to reduce iCode for pushing */
}
-/* set if conditional to 1 to disable optimizations */
-
-#define NO_packRegsForAccUse
-#if 0
-#define NO_packRegsForSupport
-#define NO_packRegsForOneuse
-//#define NO_cast_peep
-#endif
/*--------------------------------------------------------------------*/
/* pic16_packRegisters - does some transformations to reduce */
/* register pressure */
// debugLog("%d\n", __LINE__);
/* find assignment of the form TrueSym := iTempNN:1 */
/* see BUGLOG0001 for workaround with the CAST - VR */
- if ((ic->op == '=' || ic->op == CAST) && !POINTER_SET (ic))
+// if ( (ic->op == '=' || ic->op == CAST) && !POINTER_SET (ic) ) // patch 11
+ if ( (ic->op == '=') && !POINTER_SET (ic) ) // patch 11
change += packRegsForAssign (ic, ebp);
/* debug stuff */
if (ic->op == '=')
/* and serially allocate registers */
serialRegAssign (ebbs, count);
+// debugLog ("ebbs after serialRegAssign:\n");
+// dumpEbbsToDebug (ebbs, count);
+
+
//pic16_freeAllRegs();
/* if stack was extended then tell the user */
projects / fw / sdcc / blobdiff