#ifndef SDCCRALLOC_H
#define SDCCRALLOC_H 1
+#include "pcoderegs.h"
enum
X12_IDX, CND_IDX
};
-
-#define REG_PTR 0x01
-#define REG_GPR 0x02
-#define REG_CND 0x04
-#define REG_SFR 0x08
-#define REG_STK 0x10 /* Use a register as a psuedo stack */
+enum {
+ REG_PTR=1,
+ REG_GPR,
+ REG_CND,
+ REG_SFR,
+ REG_STK,
+ REG_TMP
+};
+//#define REG_PTR 0x01
+//#define REG_GPR 0x02
+//#define REG_CND 0x04
+//#define REG_SFR 0x08
+//#define REG_STK 0x10 /* Use a register as a psuedo stack */
+//#define REG_TMP 0x20
/* definition for the registers */
typedef struct regs
unsigned alias; /* Alias mask if register appears in multiple banks */
struct regs *reg_alias; /* If more than one register share the same address
* then they'll point to each other. (primarily for bits)*/
+ pCodeRegLives reglives; /* live range mapping */
}
regs;
extern regs regspic14[];
extern int pic14_nRegs;
extern int Gstack_base_addr;
+/*
+ As registers are created, they're added to a set (based on the
+ register type). Here are the sets of registers that are supported
+ in the PIC port:
+*/
+extern set *dynAllocRegs;
+extern set *dynStackRegs;
+extern set *dynProcessorRegs;
+extern set *dynDirectRegs;
+extern set *dynDirectBitRegs;
+extern set *dynInternalRegs;
+
+
regs *pic14_regWithIdx (int);
regs *dirregWithName (char *name );
void pic14_freeAllRegs ();
void pic14_deallocateAllRegs ();
regs *pic14_findFreeReg(short type);
regs *pic14_allocWithIdx (int idx);
+regs *typeRegWithIdx (int idx, int type, int fixed);
+
regs *allocDirReg (operand *op );
-regs *allocRegByName (char *name );
+regs *allocRegByName (char *name, int size );
/* Define register address that are constant across PIC family */
#define IDX_INDF 0