pCode live-range analysis algorithms have been added.

[fw/sdcc] / src / pic / ralloc.h

diff --git a/src/pic/ralloc.h b/src/pic/ralloc.h
index d0d38f5dee08b2c85d7752dbdfaf250d7a1a0977..4e49651b5aa58e00fe96bfeed9bcf9a35362a3ec 100644 (file)
--- a/src/pic/ralloc.h
+++ b/src/pic/ralloc.h
@@ -28,6 +28,9 @@
 #ifndef SDCCRALLOC_H
 #define SDCCRALLOC_H 1
 
+#include "pcoderegs.h"
+
+
 enum
   {
     R2_IDX = 0, R3_IDX, R4_IDX,
@@ -41,40 +44,75 @@ enum
 #define REG_PTR 0x01
 #define REG_GPR 0x02
 #define REG_CND 0x04
+#define REG_SFR 0x08
+#define REG_STK 0x10  /* Use a register as a psuedo stack */
+
 /* definition for the registers */
 typedef struct regs
   {
     short type;                        /* can have value 
-                                  REG_GPR, REG_PTR or REG_CND */
+                                * REG_GPR, REG_PTR or REG_CND 
+                                * This like the "meta-type" */
+    short pc_type;              /* pcode type */
     short rIdx;                        /* index into register table */
     //    short otype;        
     char *name;                        /* name */
-    char *dname;               /* name when direct access needed */
-    //  char *base ;         /* base address */
-    short offset;              /* offset from the base */
+
     unsigned isFree:1;         /* is currently unassigned  */
     unsigned wasUsed:1;                /* becomes true if register has been used */
+    unsigned isFixed:1;         /* True if address can't change */
+    unsigned isMapped:1;        /* The Register's address has been mapped to physical RAM */
+    unsigned isBitField:1;      /* True if reg is type bit OR is holder for several bits */
+    unsigned isEmitted:1;       /* True if the reg has been written to a .asm file */
+    unsigned address;           /* reg's address if isFixed | isMapped is true */
+    unsigned size;              /* 0 for byte, 1 for int, 4 for long */
+    unsigned alias;             /* Alias mask if register appears in multiple banks */
+    struct regs *reg_alias;     /* If more than one register share the same address 
+                                * then they'll point to each other. (primarily for bits)*/
+    pCodeRegLives reglives; /* live range mapping */
   }
 regs;
 extern regs regspic14[];
 extern int pic14_nRegs;
+extern int Gstack_base_addr;
+
+/*
+  As registers are created, they're added to a set (based on the
+  register type). Here are the sets of registers that are supported
+  in the PIC port:
+*/
+extern set *dynAllocRegs;
+extern set *dynStackRegs;
+extern set *dynProcessorRegs;
+extern set *dynDirectRegs;
+extern set *dynDirectBitRegs;
+extern set *dynInternalRegs;
+
 
 regs *pic14_regWithIdx (int);
+regs *dirregWithName (char *name );
 void  pic14_freeAllRegs ();
 void  pic14_deallocateAllRegs ();
-regs *pic14_findFreeReg(void);
+regs *pic14_findFreeReg(short type);
+regs *pic14_allocWithIdx (int idx);
+regs *typeRegWithIdx (int idx, int type, int fixed);
 
-enum PIC_register_types
-  {
-    PIC_INDF,
-    PIC_TMR0,
-    PIC_FSR,
-    PIC_STATUS,
-    PIC_IOPORT,
-    PIC_IOTRIS,
-    PIC_GPR,                   /*  A general purpose file register */
-    PIC_SFR                    /*  A special function register */
-  };
+regs *allocDirReg (operand *op );
+regs *allocRegByName (char *name, int size );
+
+/* Define register address that are constant across PIC family */
+#define IDX_INDF    0
+#define IDX_TMR0    1
+#define IDX_PCL     2
+#define IDX_STATUS  3
+#define IDX_FSR     4
+#define IDX_PORTA   5
+#define IDX_PORTB   6
+#define IDX_PCLATH  0x0a
+#define IDX_INTCON  0x0b
 
+#define IDX_KZ      0x7fff   /* Known zero - actually just a general purpose reg. */
+#define IDX_WSAVE   0x7ffe
+#define IDX_SSAVE   0x7ffd
 
 #endif