static int functionInlining = 1; /* inline functions if nonzero */
int debug_verbose = 0; /* Set true to inundate .asm file */
-static int GpCodeSequenceNumber = 1;
+// static int GpCodeSequenceNumber = 1;
int GpcFlowSeq = 1;
extern void RemoveUnusedRegisters(void);
extern void RegsUnMapLiveRanges(void);
extern void BuildFlowTree(pBlock *pb);
extern void pCodeRegOptimizeRegUsage(int level);
+extern int picIsInitialized(void);
/****************************************************************/
/* Forward declarations */
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,1, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_BSF,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_REGISTER // outCond
2, // num ops
1,1, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_BCF,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
(PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond
2, // num ops
0,1, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_BTFSS,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_EXAMINE_PCOP // outCond
2, // num ops
0,1, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_BTFSC,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_EXAMINE_PCOP // outCond
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_REGISTER // outCond
0, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_W // outCond
};
+pCodeInstruction pciCLRWDT = {
+ {PC_OPCODE, NULL, NULL, 0, NULL,
+ // genericAnalyze,
+ genericDestruct,
+ genericPrint},
+ POC_CLRWDT,
+ "CLRWDT",
+ NULL, // from branch
+ NULL, // to branch
+ NULL, // label
+ NULL, // operand
+ NULL, // flow block
+ NULL, // C source
+ 0, // num ops
+ 0,0, // dest, bit instruction
+ 0,0, // branch, skip
+ 0, // literal operand
+ POC_NOP,
+ PCC_NONE, // inCond
+ PCC_NONE // outCond
+};
+
pCodeInstruction pciDECF = {
{PC_OPCODE, NULL, NULL, 0, NULL,
// genericAnalyze,
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_Z // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_W, // inCond
PCC_REGISTER // outCond
pCodeInstruction pciMOVLW = {
{PC_OPCODE, NULL, NULL, 0, NULL,
- // genericAnalyze,
genericDestruct,
genericPrint},
POC_MOVLW,
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_NONE | PCC_LITERAL), // inCond
PCC_W // outCond
0, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
0, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond (not true... affects the GIE bit too)
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 1, // literal operand
POC_NOP,
PCC_LITERAL, // inCond
PCC_W // outCond
0, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_REGISTER), // inCond
(PCC_REGISTER) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_REGISTER), // inCond
(PCC_W) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_REGISTER // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
pic14Mnemonics[POC_COMFW] = &pciCOMFW;
pic14Mnemonics[POC_CLRF] = &pciCLRF;
pic14Mnemonics[POC_CLRW] = &pciCLRW;
+ pic14Mnemonics[POC_CLRWDT] = &pciCLRWDT;
pic14Mnemonics[POC_DECF] = &pciDECF;
pic14Mnemonics[POC_DECFW] = &pciDECFW;
pic14Mnemonics[POC_DECFSZ] = &pciDECFSZ;
while(pci) {
if(STRCASECMP(pci->mnemonic, mnem) == 0) {
- if((pci->num_ops <= 1) || (pci->isModReg == dest))
+ if((pci->num_ops <= 1) || (pci->isModReg == dest) || (pci->isBitInst))
return(pci->op);
}
char buffer[100];
/* create the file name */
- strcpy(buffer,srcFileName);
+ strcpy(buffer,dstFileName);
strcat(buffer,".p");
if( !(pFile = fopen(buffer, "w" ))) {
if(s)
pcl->label = Safe_strdup(s);
-
+ //fprintf(stderr,"newpCodeLabel: key=%d, name=%s\n",key, ((s)?s:""));
return ( (pCode *)pcl);
}
((pCodeOpLabel *)pcop)->key = key;
+ //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:""));
return pcop;
}
PCORB(pcop)->bit = bit;
PCORB(pcop)->inBitSpace = inBitSpace;
+ /* pCodeOpBit is derived from pCodeOpReg. We need to init this too */
+ PCOR(pcop)->r = NULL;
+ PCOR(pcop)->rIdx = 0;
return pcop;
}
if(PCOR(pcop)->r)
PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx;
- //fprintf(stderr, "newpcodeOpReg - rIdx = %d\n", PCOR(pcop)->r->rIdx);
}
pcop->type = PCOR(pcop)->r->pc_type;
pcop = newpCodeOpReg(-1);
break;
+ case PO_GPR_REGISTER:
+ if(name)
+ pcop = newpCodeOpRegFromStr(name);
+ else
+ pcop = newpCodeOpReg(-1);
+ break;
+
default:
pcop = Safe_calloc(1,sizeof(pCodeOp) );
pcop->type = type;
SAFE_snprintf(&s,&size,"(%s + %d)",
pcop->name,
PCOI(pcop)->index );
- } else
- SAFE_snprintf(&s,&size,"%s",pcop->name);
+ } else {
+ if(PCOI(pcop)->offset)
+ SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset);
+ else
+ SAFE_snprintf(&s,&size,"%s",pcop->name);
+ }
}
return buffer;
if(pcc )
return get_op(pcc->pcop,NULL,0);
+ /* gcc 3.2: warning: concatenation of string literals with __FUNCTION__ is deprecated
return ("ERROR Null: "__FUNCTION__);
+ */
+ return ("ERROR Null: get_op_from_instruction");
}
break;
case PC_FLOW:
- if(debug_verbose)
- fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
+ if(debug_verbose) {
+ fprintf(of,";<>Start of new flow, seq=0x%x",pc->seq);
+ if(PCFL(pc)->ancestor)
+ fprintf(of," ancestor = 0x%x", PCODE(PCFL(pc)->ancestor)->seq);
+ fprintf(of,"\n");
+
+ }
break;
case PC_CSOURCE:
InsertpFlow(pc, &pflow);
seq = 0;
- } else if (checkLabel(pc)) { //(PCI_HAS_LABEL(pc)) {
+ } else if (checkLabel(pc)) {
/* This instruction marks the beginning of a
* new flow segment */
pc->seq = 0;
- seq = 1;
- InsertpFlow(findPrevInstruction(pc->prev), &pflow);
+ seq = 1;
+
+ /* If the previous pCode is not a flow object, then
+ * insert a new flow object. (This check prevents
+ * two consecutive flow objects from being insert in
+ * the case where a skip instruction preceeds an
+ * instruction containing a label.) */
+
+ if(last_pci && (PCI(last_pci)->pcflow == PCFL(pflow)))
+ InsertpFlow(findPrevInstruction(pc->prev), &pflow);
PCI(pc)->pcflow = PCFL(pflow);
}
-/*-----------------------------------------------------------------*/
-/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*
+ * void LinkFlow(pBlock *pb)
+ *
+ * In BuildFlow, the PIC code has been partitioned into contiguous
+ * non-branching segments. In LinkFlow, we determine the execution
+ * order of these segments. For example, if one of the segments ends
+ * with a skip, then we know that there are two possible flow segments
+ * to which control may be passed.
+ *-----------------------------------------------------------------*/
void LinkFlow(pBlock *pb)
{
pCode *pc=NULL;
//pc->print(stderr,pc);
if(!(pcol && isPCOLAB(pcol))) {
- if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL)) {
+ if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL) && (PCI(pc)->op != POC_RETFIE) ) {
pc->print(stderr,pc);
fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__);
}
if( (pct = findLabelinpBlock(pb,pcol)) != NULL)
LinkFlow_pCode(PCI(pc),PCI(pct));
else
- fprintf(stderr, "ERROR: %s, couldn't find label\n",__FUNCTION__);
+ fprintf(stderr, "ERROR: %s, couldn't find label. key=%d,lab=%s\n",
+ __FUNCTION__,pcol->key,((PCOP(pcol)->name)?PCOP(pcol)->name:"-"));
+ //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:""));
continue;
}
}
}
+/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
-void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit)
+void insertBankSwitch(int position, pCode *pc, int Set_Clear, int RP_BankBit)
{
pCode *new_pc;
new_pc = newpCode((Set_Clear ? POC_BSF : POC_BCF),
popCopyGPR2Bit(PCOP(&pc_status),RP_BankBit));
- pCodeInsertAfter(pc->prev, new_pc);
+ if(position) {
+ /* insert the bank switch after this pc instruction */
+ pCode *pcnext = findNextInstruction(pc);
+ pCodeInsertAfter(pc, new_pc);
+ if(pcnext)
+ pc = pcnext;
+
+ } else
+ pCodeInsertAfter(pc->prev, new_pc);
/* Move the label, if there is one */
while(isPCinFlow(pc,PCODE(pcfl))) {
-
reg = getRegFromInstruction(pc);
#if 0
if(reg) {
}
#endif
- if(reg && REG_BANK(reg)!=cur_bank) {
+ if( ( (reg && REG_BANK(reg)!=cur_bank) ||
+ ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) &&
+ (!isPCI_LIT(pc)) ){
+
/* Examine the instruction before this one to make sure it is
* not a skip type instruction */
pcprev = findPrevpCode(pc->prev, PC_OPCODE);
+
if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
- int b = cur_bank ^ REG_BANK(reg);
+ int b;
+ int reg_bank;
+
+ reg_bank = (reg) ? REG_BANK(reg) : 0;
+
+ b = cur_bank ^ reg_bank;
//fprintf(stderr, "Cool! can switch banks\n");
- cur_bank = REG_BANK(reg);
+ cur_bank = reg_bank;
switch(b & 3) {
case 0:
break;
case 1:
- insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT);
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
break;
case 2:
- insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
- insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
break;
case 3:
if(cur_bank & 3) {
- insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT);
- insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
} else
- insertBankSwitch(pc, -1, -1);
+ insertBankSwitch(0, pc, -1, -1);
break;
- /*
- new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF),
- popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
- pCodeInsertAfter(pc->prev, new_pc);
- if(PCI(pc)->label) {
- PCI(new_pc)->label = PCI(pc)->label;
- PCI(pc)->label = NULL;
- }
- */
- /*
- new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF),
- popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
- pCodeInsertAfter(pc, new_pc);
- */
}
void exchangeLabels(pCodeLabel *pcl, pCode *pc)
{
+ char *s=NULL;
+
if(isPCI(pc) &&
(PCI(pc)->pcop) &&
(PCI(pc)->pcop->type == PO_LABEL)) {
if(pcol->pcop.name)
free(pcol->pcop.name);
- sprintf(buffer,"_%05d_DS_",pcl->key);
-
- pcol->pcop.name = Safe_strdup(buffer);
+ /* If the key is negative, then we (probably) have a label to
+ * a function and the name is already defined */
+
+ if(pcl->key>0)
+ sprintf(s=buffer,"_%05d_DS_",pcl->key);
+ else
+ s = pcl->label;
+
+ //sprintf(buffer,"_%05d_DS_",pcl->key);
+ if(!s) {
+ fprintf(stderr, "ERROR %s:%d function label is null\n",__FUNCTION__,__LINE__);
+ }
+ pcol->pcop.name = Safe_strdup(s);
pcol->key = pcl->key;
//pc->print(stderr,pc);
{
pCode *pc=NULL;
pCode *pcprev=NULL;
- pCode *new_pc;
int cur_bank;
regs *reg;
- // return;
+
if(!pb)
return;
//genericPrint(stderr, pc);
reg = getRegFromInstruction(pc);
- #if 0
+#if 0
if(reg) {
fprintf(stderr, " %s ",reg->name);
- fprintf(stderr, "addr = 0x%03x, bank = %d\n",reg->address,REG_BANK(reg));
+ fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\n",
+ reg->address,REG_BANK(reg),reg->isBitField);
}
- #endif
- if(reg && REG_BANK(reg)!=cur_bank) {
+#endif
+
+ if( ( (reg && REG_BANK(reg)!=cur_bank) ||
+ ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) &&
+ (!isPCI_LIT(pc)) ){
+
+
/* Examine the instruction before this one to make sure it is
* not a skip type instruction */
pcprev = findPrevpCode(pc->prev, PC_OPCODE);
- if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
- int b = cur_bank ^ REG_BANK(reg);
- //fprintf(stderr, "Cool! can switch banks\n");
- cur_bank = REG_BANK(reg);
- if(b & 1) {
- new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF),
- popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
- pCodeInsertAfter(pc->prev, new_pc);
- if(PCI(pc)->label) {
- PCI(new_pc)->label = PCI(pc)->label;
- PCI(pc)->label = NULL;
- }
- /*
- new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF),
- popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
- pCodeInsertAfter(pc, new_pc);
- */
+ if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
+ int b;
+ int reg_bank;
+
+ reg_bank = (reg) ? REG_BANK(reg) : 0;
+
+ b = cur_bank ^ reg_bank;
+
+ cur_bank = reg_bank;
+ switch(b & 3) {
+ case 0:
+ break;
+ case 1:
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+ break;
+ case 2:
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ break;
+ case 3:
+ if(cur_bank & 3) {
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ } else
+ insertBankSwitch(0, pc, -1, -1);
+ break;
}
- } else {
+ }else {
//fprintf(stderr, "Bummer can't switch banks\n");
;
}
}
+
+ pcprev = pc;
+
}
- pcprev = pc;
pc = pc->next;
// } while(pc && !(isPCFL(pc)));
}while (pc);
- if(pcprev && cur_bank) {
- /* Brute force - make sure that we point to bank 0 at the
- * end of each flow block */
- new_pc = newpCode(POC_BCF,
- popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
- pCodeInsertAfter(pcprev, new_pc);
- cur_bank = 0;
+ if(pcprev && cur_bank) {
+
+ int pos = 1; /* Assume that the bank swithc instruction(s)
+ * are inserted after this instruction */
+
+ if((PCI(pcprev)->op == POC_RETLW) ||
+ (PCI(pcprev)->op == POC_RETURN) ||
+ (PCI(pcprev)->op == POC_RETFIE)) {
+
+ /* oops, a RETURN - we need to switch banks *before* the RETURN */
+
+ pos = 0;
+
+ }
+
+ /* Brute force - make sure that we point to bank 0 at the
+ * end of each flow block */
+
+ switch(cur_bank & 3) {
+ case 0:
+ break;
+ case 1:
+ insertBankSwitch(pos, pcprev, 0, PIC_RP0_BIT);
+ break;
+ case 2:
+ insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT);
+ insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT);
+ break;
+ case 3:
+ insertBankSwitch(pos, pcprev, -1, -1);
+ break;
+
}
+/*
+ new_pc = newpCode(POC_BCF,
+ popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
+ pCodeInsertAfter(pcprev, new_pc);
+*/
+ cur_bank = 0;
+ //fprintf(stderr, "Brute force switch\n");
+ }
}
+
+
+
+#if 0
+ if(reg && REG_BANK(reg)!=cur_bank) {
+ //fprintf(stderr,"need to switch banks\n");
+ /* Examine the instruction before this one to make sure it is
+ * not a skip type instruction */
+ pcprev = findPrevpCode(pc->prev, PC_OPCODE);
+ if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
+ int b = cur_bank ^ REG_BANK(reg);
+
+ cur_bank = REG_BANK(reg);
+
+ switch(b & 3) {
+ case 0:
+ break;
+ case 1:
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+ break;
+ case 2:
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ break;
+ case 3:
+ if(cur_bank & 3) {
+ insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+ insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+ } else
+ insertBankSwitch(0, pc, -1, -1);
+ break;
+
+ }
+#endif
+
+
+
+
void pBlockDestruct(pBlock *pb)
{
* In this phase, the individual flow blocks are examined
* to determine their order of excution.
*/
- /*
+
for(pb = the_pFile->pbHead; pb; pb = pb->next)
BuildFlowTree(pb);
- */
+
/* Phase x - Flow Analysis - Used Banks
*
{
pBlock *pb;
+ if(!picIsInitialized()) {
+ fprintf(stderr,"Temporary ERROR: at the moment you have to use\n");
+ fprintf(stderr,"an include file create by inc2h.pl. See SDCC source:\n");
+ fprintf(stderr,"support/scripts/inc2h.pl\n");
+ fprintf(stderr,"this is a nuisance bug that will be fixed shortly\n");
+
+ exit(1);
+ }
+
/* Phase x - Flow Analysis - Used Banks
*
* In this phase, the individual flow blocks are examined
projects / fw / sdcc / blobdiff