// Eventually this will go into device dependent files:
-pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL};
+pCodeOpReg pc_status = {{PO_STATUS, "_STATUS"}, -1, NULL,0,NULL};
pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL};
pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL};
pCodeOpReg pc_intcon = {{PO_INTCON, ""}, -1, NULL,0,NULL};
pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL};
-pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL};
+pCodeOpReg pc_pclath = {{PO_PCLATH, "_PCLATH"}, -1, NULL,0,NULL};
pCodeOpReg pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL};
pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL};
static pFile *the_pFile = NULL;
+static pBlock *pb_dead_pcodes = NULL;
/* Hardcoded flags to change the behavior of the PIC port */
static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */
static int functionInlining = 1; /* inline functions if nonzero */
+int debug_verbose = 0; /* Set true to inundate .asm file */
static int GpCodeSequenceNumber = 1;
-static int GpcFlowSeq = 1;
+int GpcFlowSeq = 1;
extern void RemoveUnusedRegisters(void);
+extern void RegsUnMapLiveRanges(void);
+extern void BuildFlowTree(pBlock *pb);
+extern void pCodeRegOptimizeRegUsage(int level);
/****************************************************************/
/* Forward declarations */
int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd);
int pCodePeepMatchRule(pCode *pc);
void pBlockStats(FILE *of, pBlock *pb);
+pBlock *newpBlock(void);
extern void pCodeInsertAfter(pCode *pc1, pCode *pc2);
extern pCodeOp *popCopyReg(pCodeOpReg *pc);
pCodeOp *popCopyGPR2Bit(pCodeOp *pc, int bitval);
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_W, // inCond
+ (PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
};
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_W, // inCond
+ (PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
};
1,1, // dest, bit instruction
0,0, // branch, skip
POC_BSF,
- PCC_REGISTER, // inCond
+ (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_REGISTER // outCond
};
1,1, // dest, bit instruction
0,0, // branch, skip
POC_BCF,
- PCC_REGISTER, // inCond
- PCC_REGISTER // outCond
+ (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
+ (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond
};
pCodeInstruction pciBTFSC = {
0,1, // dest, bit instruction
1,1, // branch, skip
POC_BTFSS,
- PCC_REGISTER, // inCond
- PCC_NONE // outCond
+ (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
+ PCC_EXAMINE_PCOP // outCond
};
pCodeInstruction pciBTFSS = {
0,1, // dest, bit instruction
1,1, // branch, skip
POC_BTFSC,
- PCC_REGISTER, // inCond
- PCC_NONE // outCond
+ (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
+ PCC_EXAMINE_PCOP // outCond
};
pCodeInstruction pciCALL = {
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_W, // inCond
+ (PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
};
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_NONE, // inCond
+ (PCC_NONE | PCC_LITERAL), // inCond
PCC_W // outCond
};
0,0, // dest, bit instruction
1,0, // branch, skip
POC_NOP,
- PCC_NONE, // inCond
+ PCC_LITERAL, // inCond
PCC_W // outCond
};
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_W, // inCond
+ (PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
};
0,0, // dest, bit instruction
0,0, // branch, skip
POC_NOP,
- PCC_W, // inCond
+ (PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
};
void pCodeInitRegisters(void)
{
+ static int initialized=0;
+
+ if(initialized)
+ return;
+ initialized = 1;
initStack(0xfff, 8);
init_pic(port->processor);
- pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80);
+ pc_status.r = allocProcessorRegister(IDX_STATUS,"_STATUS", PO_STATUS, 0x80);
pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80);
- pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80);
+ pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"_PCLATH", PO_PCLATH, 0x80);
pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x80);
pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80);
pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80);
pc_wsave.rIdx = IDX_WSAVE;
pc_ssave.rIdx = IDX_SSAVE;
+ /* probably should put this in a separate initialization routine */
+ pb_dead_pcodes = newpBlock();
+
}
/*-----------------------------------------------------------------*/
memcpy(pci, pic14Mnemonics[op], sizeof(pCodeInstruction));
pci->pcop = pcop;
- if(pci->inCond == PCC_EXAMINE_PCOP)
- pci->inCond = RegCond(pcop);
+ if(pci->inCond & PCC_EXAMINE_PCOP)
+ pci->inCond |= RegCond(pcop);
- if(pci->outCond == PCC_EXAMINE_PCOP)
- pci->outCond = RegCond(pcop);
+ if(pci->outCond & PCC_EXAMINE_PCOP)
+ pci->outCond |= RegCond(pcop);
pci->pc.prev = pci->pc.next = NULL;
return (pCode *)pci;
/*-----------------------------------------------------------------*/
/* newpCodeFlow */
/*-----------------------------------------------------------------*/
-
void destructpCodeFlow(pCode *pc)
{
if(!pc || !isPCFL(pc))
return;
- if(PCFL(pc)->uses)
- free(PCFL(pc)->uses);
/*
if(PCFL(pc)->from)
if(PCFL(pc)->to)
*/
+ unlinkpCode(pc);
+
+ deleteSet(&PCFL(pc)->registers);
+ deleteSet(&PCFL(pc)->from);
+ deleteSet(&PCFL(pc)->to);
free(pc);
+
}
pCode *newpCodeFlow(void )
pcflow->pc.type = PC_FLOW;
pcflow->pc.prev = pcflow->pc.next = NULL;
- //pcflow->pc.from = pcflow->pc.to = pcflow->pc.label = NULL;
pcflow->pc.pb = NULL;
// pcflow->pc.analyze = genericAnalyze;
pcflow->pc.seq = GpcFlowSeq++;
- pcflow->nuses = 7;
- pcflow->uses = Safe_calloc(pcflow->nuses, sizeof(set *));
-
pcflow->from = pcflow->to = NULL;
pcflow->inCond = PCC_NONE;
PpB->function_entries = PpB->function_exits = PpB->function_calls = NULL;
PpB->tregisters = NULL;
PpB->visited = 0;
+ PpB->FlowTree = NULL;
return PpB;
pcop = Safe_calloc(1,sizeof(pCodeOpImmd) );
pcop->type = PO_IMMEDIATE;
if(name) {
+ regs *r = dirregWithName(name);
pcop->name = Safe_strdup(name);
+ PCOI(pcop)->r = r;
+ if(r) {
+ //fprintf(stderr, " newpCodeOpImmd reg %s exists\n",name);
+ PCOI(pcop)->rIdx = r->rIdx;
+ } else {
+ //fprintf(stderr, " newpCodeOpImmd reg %s doesn't exist\n",name);
+ PCOI(pcop)->rIdx = -1;
+ }
//fprintf(stderr,"%s %s %d\n",__FUNCTION__,name,offset);
} else {
pcop->name = NULL;
}
-
PCOI(pcop)->index = index;
PCOI(pcop)->offset = offset;
PCOI(pcop)->_const = code_space;
/*-----------------------------------------------------------------*/
void addpCode2pBlock(pBlock *pb, pCode *pc)
{
+
+ if(!pc)
+ return;
+
if(!pb->pcHead) {
/* If this is the first pcode to be added to a block that
* was initialized with a NULL pcode, then go ahead and
* make this pcode the head and tail */
pb->pcHead = pb->pcTail = pc;
} else {
+ // if(pb->pcTail)
pb->pcTail->next = pc;
+
pc->prev = pb->pcTail;
- //pc->next = NULL;
pc->pb = pb;
+
pb->pcTail = pc;
}
}
pc->prev = pc->next = NULL;
}
}
+
+/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*/
+
static void genericDestruct(pCode *pc)
{
- //fprintf(stderr,"warning, calling default pCode destructor\n");
unlinkpCode(pc);
- free(pc);
+ if(isPCI(pc)) {
+ /* For instructions, tell the register (if there's one used)
+ * that it's no longer needed */
+ regs *reg = getRegFromInstruction(pc);
+ if(reg)
+ deleteSetItem (&(reg->reglives.usedpCodes),pc);
+ }
+
+ /* Instead of deleting the memory used by this pCode, mark
+ * the object as bad so that if there's a pointer to this pCode
+ * dangling around somewhere then (hopefully) when the type is
+ * checked we'll catch it.
+ */
+
+ pc->type = PC_BAD;
+
+ addpCode2pBlock(pb_dead_pcodes, pc);
+
+ //free(pc);
}
SAFE_snprintf(&s,&size,";\t--FLOW change\n");
break;
case PC_CSOURCE:
- SAFE_snprintf(&s,&size,";#CSRC\t%s %d\n; %s\n", PCCS(pc)->file_name, PCCS(pc)->line_number, PCCS(pc)->line);
+ SAFE_snprintf(&s,&size,";#CSRC\t%s %d\n; %s\n", PCCS(pc)->file_name, PCCS(pc)->line_number, PCCS(pc)->line);
break;
+ case PC_BAD:
+ SAFE_snprintf(&s,&size,";A bad pCode is being used\n");
}
return str;
fprintf(of,"%s",str);
/* Debug */
- fprintf(of, "\t;key=%03x",pc->seq);
- if(PCI(pc)->pcflow)
- fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+ if(debug_verbose) {
+ fprintf(of, "\t;key=%03x",pc->seq);
+ if(PCI(pc)->pcflow)
+ fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+ }
}
#if 0
{
break;
case PC_FLOW:
- fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
+ if(debug_verbose)
+ fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
break;
case PC_CSOURCE:
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
-static pBranch * pBranchAppend(pBranch *h, pBranch *n)
+pBranch * pBranchAppend(pBranch *h, pBranch *n)
{
pBranch *b;
if(!h)
return n;
+ if(h == n)
+ return n;
+
b = h;
while(b->next)
b = b->next;
fprintf(stderr,"analyze PC_FLOW\n");
return;
+ case PC_BAD:
+ fprintf(stderr,,";A bad pCode is being used\n");
+
}
}
#endif
/*-----------------------------------------------------------------*/
regs * getRegFromInstruction(pCode *pc)
{
+
if(!pc ||
!isPCI(pc) ||
!PCI(pc)->pcop ||
switch(PCI(pc)->pcop->type) {
case PO_INDF:
case PO_FSR:
- return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
+ return PCOR(PCI(pc)->pcop)->r;
+
+ // return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
case PO_BIT:
case PO_GPR_TEMP:
return PCOR(PCI(pc)->pcop)->r;
case PO_IMMEDIATE:
+ if(PCOI(PCI(pc)->pcop)->r)
+ return (PCOI(PCI(pc)->pcop)->r);
+
//fprintf(stderr, "getRegFromInstruction - immediate\n");
- return NULL; // PCOR(PCI(pc)->pcop)->r;
+ return dirregWithName(PCI(pc)->pcop->name);
+ //return NULL; // PCOR(PCI(pc)->pcop)->r;
case PO_GPR_BIT:
return PCOR(PCI(pc)->pcop)->r;
void InsertpFlow(pCode *pc, pCode **pflow)
{
- PCFL(*pflow)->end = pc;
+ if(*pflow)
+ PCFL(*pflow)->end = pc;
if(!pc || !pc->next)
return;
{
pCode *pc;
pCode *last_pci=NULL;
- pCode *pflow;
+ pCode *pflow=NULL;
int seq = 0;
if(!pb)
//fprintf (stderr,"build flow start seq %d ",GpcFlowSeq);
/* Insert a pCodeFlow object at the beginning of a pBlock */
- pflow = newpCodeFlow(); /* Create a new Flow object */
- pflow->next = pb->pcHead; /* Make the current head the next object */
- pb->pcHead->prev = pflow; /* let the current head point back to the flow object */
- pb->pcHead = pflow; /* Make the Flow object the head */
- pflow->pb = pb;
+ InsertpFlow(pb->pcHead, &pflow);
+
+ //pflow = newpCodeFlow(); /* Create a new Flow object */
+ //pflow->next = pb->pcHead; /* Make the current head the next object */
+ //pb->pcHead->prev = pflow; /* let the current head point back to the flow object */
+ //pb->pcHead = pflow; /* Make the Flow object the head */
+ //pflow->pb = pb;
for( pc = findNextInstruction(pb->pcHead);
pc != NULL;
}
//fprintf (stderr,",end seq %d",GpcFlowSeq);
- PCFL(pflow)->end = pb->pcTail;
+ if(pflow)
+ PCFL(pflow)->end = pb->pcTail;
}
/*-------------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
void unBuildFlow(pBlock *pb)
{
- pCode *pc;
+ pCode *pc,*pcnext;
if(!pb)
return;
pc = pb->pcHead;
+
while(pc) {
- pCode *pcn = pc->next;
+ pcnext = pc->next;
if(isPCI(pc)) {
+
pc->seq = 0;
- PCI(pc)->pcflow = NULL;
- pc = pcn;
- } else if(isPCFL(pc)) {
- unlinkpCode(pc);
+ if(PCI(pc)->pcflow) {
+ //free(PCI(pc)->pcflow);
+ PCI(pc)->pcflow = NULL;
+ }
+
+ } else if(isPCFL(pc) )
pc->destruct(pc);
- } else
- pc = pcn;
+ pc = pcnext;
}
+
}
/*-----------------------------------------------------------------*/
//pc->print(stderr,pc);
if(!(pcol && isPCOLAB(pcol))) {
- if((PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL)) {
+ if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL)) {
pc->print(stderr,pc);
fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__);
}
*/
pc = findNextInstruction(pb->pcHead);
+ if(!pc)
+ return 0;
+
pcprev = pc->prev;
do {
/* Now loop through the pBlock and merge the labels with the opcodes */
- for(pc = pb->pcHead; pc; pc = pc->next) {
+ pc = pb->pcHead;
+ // for(pc = pb->pcHead; pc; pc = pc->next) {
+
+ while(pc) {
+ pCode *pcn = pc->next;
if(pc->type == PC_LABEL) {
//fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key);
if((pcnext = findNextInstruction(pc) )) {
- pCode *pcn = pc->next;
-
// Unlink the pCode label from it's pCode chain
unlinkpCode(pc);
pbr->pc = pc;
pbr->next = NULL;
-
PCI(pcnext)->label = pBranchAppend(PCI(pcnext)->label,pbr);
-
- pc = pcn;
} else {
fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label);
/* merge the source line symbolic info into the next instruction */
if((pcnext = findNextInstruction(pc) )) {
- pCode *pcn = pc->next;
-
// Unlink the pCode label from it's pCode chain
unlinkpCode(pc);
PCI(pcnext)->cline = PCCS(pc);
//fprintf(stderr, "merging CSRC\n");
//genericPrint(stderr,pcnext);
- pc = pcn;
}
}
-
+ pc = pcn;
}
pBlockRemoveUnusedLabels(pb);
}
/*-----------------------------------------------------------------*/
-/* AnalyzeBanking - Called after the memory addresses have been */
-/* assigned to the registers. */
+/* AnalyzeFlow - Examine the flow of the code and optimize */
/* */
+/* level 0 == minimal optimization */
+/* optimize registers that are used only by two instructions */
+/* level 1 == maximal optimization */
+/* optimize by looking at pairs of instructions that use the */
+/* register. */
/*-----------------------------------------------------------------*/
-void AnalyzeBanking(void)
+
+void AnalyzeFlow(int level)
{
+ static int times_called=0;
pBlock *pb;
return;
+ /* if this is not the first time this function has been called,
+ then clean up old flow information */
+ if(times_called++) {
+ for(pb = the_pFile->pbHead; pb; pb = pb->next)
+ unBuildFlow(pb);
+
+ RegsUnMapLiveRanges();
+
+ }
+
+ GpcFlowSeq = 1;
+
/* Phase 2 - Flow Analysis - Register Banking
*
* In this phase, the individual flow blocks are examined
for(pb = the_pFile->pbHead; pb; pb = pb->next)
LinkFlow(pb);
-
- /* Phase x - Flow Analysis - Used Banks
+ /* Phase 3 - Flow Analysis - Flow Tree
*
* In this phase, the individual flow blocks are examined
- * to determine the Register Banks they use
+ * to determine their order of excution.
*/
-
+ /*
for(pb = the_pFile->pbHead; pb; pb = pb->next)
- BanksUsedFlow(pb);
+ BuildFlowTree(pb);
+ */
/* Phase x - Flow Analysis - Used Banks
*
RemoveUnusedRegisters();
+ // for(pb = the_pFile->pbHead; pb; pb = pb->next)
+ pCodeRegOptimizeRegUsage(level);
+
+ OptimizepCode('*');
+
+
/*
for(pb = the_pFile->pbHead; pb; pb = pb->next)
DumpFlow(pb);
FillFlow(PCFL(pcflow));
}
}
+
/*
for(pb = the_pFile->pbHead; pb; pb = pb->next) {
pCode *pcflow;
*/
}
+/*-----------------------------------------------------------------*/
+/* AnalyzeBanking - Called after the memory addresses have been */
+/* assigned to the registers. */
+/* */
+/*-----------------------------------------------------------------*/
+
+void AnalyzeBanking(void)
+{
+ pBlock *pb;
+
+ /* Phase x - Flow Analysis - Used Banks
+ *
+ * In this phase, the individual flow blocks are examined
+ * to determine the Register Banks they use
+ */
+
+ AnalyzeFlow(0);
+ AnalyzeFlow(1);
+
+ for(pb = the_pFile->pbHead; pb; pb = pb->next)
+ BanksUsedFlow(pb);
+}
+
/*-----------------------------------------------------------------*/
/* buildCallTree - look at the flow and extract all of the calls */
/* */