/* Hardcoded flags to change the behavior of the PIC port */
static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */
static int functionInlining = 1; /* inline functions if nonzero */
+int debug_verbose = 0; /* Set true to inundate .asm file */
static int GpCodeSequenceNumber = 1;
int GpcFlowSeq = 1;
extern void RemoveUnusedRegisters(void);
+extern void RegsUnMapLiveRanges(void);
extern void BuildFlowTree(pBlock *pb);
-extern void pCodeRegOptimizeRegUsage(void);
+extern void pCodeRegOptimizeRegUsage(int level);
/****************************************************************/
/* Forward declarations */
/*-----------------------------------------------------------------*/
/* newpCodeFlow */
/*-----------------------------------------------------------------*/
-
void destructpCodeFlow(pCode *pc)
{
if(!pc || !isPCFL(pc))
return;
- if(PCFL(pc)->uses)
- free(PCFL(pc)->uses);
/*
if(PCFL(pc)->from)
if(PCFL(pc)->to)
*/
+ unlinkpCode(pc);
+
+ deleteSet(&PCFL(pc)->registers);
+ deleteSet(&PCFL(pc)->from);
+ deleteSet(&PCFL(pc)->to);
free(pc);
+
}
pCode *newpCodeFlow(void )
pcflow->pc.type = PC_FLOW;
pcflow->pc.prev = pcflow->pc.next = NULL;
- //pcflow->pc.from = pcflow->pc.to = pcflow->pc.label = NULL;
pcflow->pc.pb = NULL;
// pcflow->pc.analyze = genericAnalyze;
pcflow->pc.seq = GpcFlowSeq++;
- pcflow->nuses = 7;
- pcflow->uses = Safe_calloc(pcflow->nuses, sizeof(set *));
-
pcflow->from = pcflow->to = NULL;
pcflow->inCond = PCC_NONE;
/*-----------------------------------------------------------------*/
void addpCode2pBlock(pBlock *pb, pCode *pc)
{
+
+ if(!pc)
+ return;
+
if(!pb->pcHead) {
/* If this is the first pcode to be added to a block that
* was initialized with a NULL pcode, then go ahead and
* make this pcode the head and tail */
pb->pcHead = pb->pcTail = pc;
} else {
+ // if(pb->pcTail)
pb->pcTail->next = pc;
+
pc->prev = pb->pcTail;
- //pc->next = NULL;
pc->pb = pb;
+
pb->pcTail = pc;
}
}
fprintf(of,"%s",str);
/* Debug */
- fprintf(of, "\t;key=%03x",pc->seq);
- if(PCI(pc)->pcflow)
- fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+ if(debug_verbose) {
+ fprintf(of, "\t;key=%03x",pc->seq);
+ if(PCI(pc)->pcflow)
+ fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+ }
}
#if 0
{
break;
case PC_FLOW:
- fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
+ if(debug_verbose)
+ fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
break;
case PC_CSOURCE:
switch(PCI(pc)->pcop->type) {
case PO_INDF:
case PO_FSR:
- return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
+ return PCOR(PCI(pc)->pcop)->r;
+
+ // return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
case PO_BIT:
case PO_GPR_TEMP:
void InsertpFlow(pCode *pc, pCode **pflow)
{
- PCFL(*pflow)->end = pc;
+ if(*pflow)
+ PCFL(*pflow)->end = pc;
if(!pc || !pc->next)
return;
{
pCode *pc;
pCode *last_pci=NULL;
- pCode *pflow;
+ pCode *pflow=NULL;
int seq = 0;
if(!pb)
//fprintf (stderr,"build flow start seq %d ",GpcFlowSeq);
/* Insert a pCodeFlow object at the beginning of a pBlock */
- pflow = newpCodeFlow(); /* Create a new Flow object */
- pflow->next = pb->pcHead; /* Make the current head the next object */
- pb->pcHead->prev = pflow; /* let the current head point back to the flow object */
- pb->pcHead = pflow; /* Make the Flow object the head */
- pflow->pb = pb;
+ InsertpFlow(pb->pcHead, &pflow);
+
+ //pflow = newpCodeFlow(); /* Create a new Flow object */
+ //pflow->next = pb->pcHead; /* Make the current head the next object */
+ //pb->pcHead->prev = pflow; /* let the current head point back to the flow object */
+ //pb->pcHead = pflow; /* Make the Flow object the head */
+ //pflow->pb = pb;
for( pc = findNextInstruction(pb->pcHead);
pc != NULL;
}
//fprintf (stderr,",end seq %d",GpcFlowSeq);
- PCFL(pflow)->end = pb->pcTail;
+ if(pflow)
+ PCFL(pflow)->end = pb->pcTail;
}
/*-------------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
void unBuildFlow(pBlock *pb)
{
- pCode *pc;
+ pCode *pc,*pcnext;
if(!pb)
return;
pc = pb->pcHead;
+
while(pc) {
- pCode *pcn = pc->next;
+ pcnext = pc->next;
if(isPCI(pc)) {
+
pc->seq = 0;
- PCI(pc)->pcflow = NULL;
- pc = pcn;
- } else if(isPCFL(pc)) {
- unlinkpCode(pc);
+ if(PCI(pc)->pcflow) {
+ //free(PCI(pc)->pcflow);
+ PCI(pc)->pcflow = NULL;
+ }
+
+ } else if(isPCFL(pc) )
pc->destruct(pc);
- } else
- pc = pcn;
+ pc = pcnext;
}
+
}
/*-----------------------------------------------------------------*/
*/
pc = findNextInstruction(pb->pcHead);
+ if(!pc)
+ return 0;
+
pcprev = pc->prev;
do {
/* Now loop through the pBlock and merge the labels with the opcodes */
- for(pc = pb->pcHead; pc; pc = pc->next) {
+ pc = pb->pcHead;
+ // for(pc = pb->pcHead; pc; pc = pc->next) {
+
+ while(pc) {
+ pCode *pcn = pc->next;
if(pc->type == PC_LABEL) {
//fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key);
if((pcnext = findNextInstruction(pc) )) {
- pCode *pcn = pc->next;
-
// Unlink the pCode label from it's pCode chain
unlinkpCode(pc);
pbr->pc = pc;
pbr->next = NULL;
-
PCI(pcnext)->label = pBranchAppend(PCI(pcnext)->label,pbr);
-
- pc = pcn;
} else {
fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label);
/* merge the source line symbolic info into the next instruction */
if((pcnext = findNextInstruction(pc) )) {
- pCode *pcn = pc->next;
-
// Unlink the pCode label from it's pCode chain
unlinkpCode(pc);
PCI(pcnext)->cline = PCCS(pc);
//fprintf(stderr, "merging CSRC\n");
//genericPrint(stderr,pcnext);
- pc = pcn;
}
}
-
+ pc = pcn;
}
pBlockRemoveUnusedLabels(pb);
}
/*-----------------------------------------------------------------*/
-/* AnalyzeBanking - Called after the memory addresses have been */
-/* assigned to the registers. */
+/* AnalyzeFlow - Examine the flow of the code and optimize */
/* */
+/* level 0 == minimal optimization */
+/* optimize registers that are used only by two instructions */
+/* level 1 == maximal optimization */
+/* optimize by looking at pairs of instructions that use the */
+/* register. */
/*-----------------------------------------------------------------*/
-void AnalyzeBanking(void)
+
+void AnalyzeFlow(int level)
{
+ static int times_called=0;
pBlock *pb;
return;
+ /* if this is not the first time this function has been called,
+ then clean up old flow information */
+ if(times_called++) {
+ for(pb = the_pFile->pbHead; pb; pb = pb->next)
+ unBuildFlow(pb);
+
+ RegsUnMapLiveRanges();
+
+ }
+
+ GpcFlowSeq = 1;
+
/* Phase 2 - Flow Analysis - Register Banking
*
* In this phase, the individual flow blocks are examined
BuildFlowTree(pb);
*/
- /* Phase x - Flow Analysis - Used Banks
- *
- * In this phase, the individual flow blocks are examined
- * to determine the Register Banks they use
- */
-
- for(pb = the_pFile->pbHead; pb; pb = pb->next)
- BanksUsedFlow(pb);
-
/* Phase x - Flow Analysis - Used Banks
*
* In this phase, the individual flow blocks are examined
RemoveUnusedRegisters();
// for(pb = the_pFile->pbHead; pb; pb = pb->next)
- pCodeRegOptimizeRegUsage();
+ pCodeRegOptimizeRegUsage(level);
OptimizepCode('*');
+
/*
for(pb = the_pFile->pbHead; pb; pb = pb->next)
DumpFlow(pb);
FillFlow(PCFL(pcflow));
}
}
+
/*
for(pb = the_pFile->pbHead; pb; pb = pb->next) {
pCode *pcflow;
*/
}
+/*-----------------------------------------------------------------*/
+/* AnalyzeBanking - Called after the memory addresses have been */
+/* assigned to the registers. */
+/* */
+/*-----------------------------------------------------------------*/
+
+void AnalyzeBanking(void)
+{
+ pBlock *pb;
+
+ /* Phase x - Flow Analysis - Used Banks
+ *
+ * In this phase, the individual flow blocks are examined
+ * to determine the Register Banks they use
+ */
+
+ AnalyzeFlow(0);
+ AnalyzeFlow(1);
+
+ for(pb = the_pFile->pbHead; pb; pb = pb->next)
+ BanksUsedFlow(pb);
+}
+
/*-----------------------------------------------------------------*/
/* buildCallTree - look at the flow and extract all of the calls */
/* */
projects / fw / sdcc / blobdiff