pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL};
pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL};
pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL};
-pCodeOpReg pc_intcon = {{PO_INTCON, ""}, -1, NULL,0,NULL};
+pCodeOpReg pc_intcon = {{PO_INTCON, "INTCON"}, -1, NULL,0,NULL};
pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL};
pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL};
static pBlock *pb_dead_pcodes = NULL;
/* Hardcoded flags to change the behavior of the PIC port */
-static int peepOptimizing = 0; /* run the peephole optimizer if nonzero */
+static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */
static int functionInlining = 1; /* inline functions if nonzero */
int debug_verbose = 0; /* Set true to inundate .asm file */
stkSize = 8; // Set pseudo stack size to 8
initStack(shareBankAddress, stkSize); // Putting the pseudo stack in shared memory so all modules use the same register when passing fn parameters
init_pic(port->processor);
+ if ((unsigned)shareBankAddress > getMaxRam())
+ shareBankAddress = (int)getMaxRam();
pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x180);
pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80);
pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x180);
pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x180);
- pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80);
+ pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x180);
pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x180);
pc_status.rIdx = IDX_STATUS;
} else
pcor->pcop.name = NULL;
- pcor->r = pc->r;
- pcor->rIdx = pc->rIdx;
- pcor->r->wasUsed=1;
-
+ if (pcor->pcop.type == PO_IMMEDIATE){
+ PCOL(pcor)->lit = PCOL(pc)->lit;
+ } else {
+ pcor->r = pc->r;
+ pcor->rIdx = pc->rIdx;
+ if (pcor->r)
+ pcor->r->wasUsed=1;
+ }
//DEBUGpic14_emitcode ("; ***","%s , copying %s, rIdx=%d",__FUNCTION__,pc->pcop.name,pc->rIdx);
return PCOP(pcor);
(((pCodeOpRegBit *)(PCI(pc)->pcop))->bit)&7);
} else if(PCI(pc)->pcop->type == PO_GPR_BIT) {
SAFE_snprintf(&s,&size,"%s,%d", get_op_from_instruction(PCI(pc)),PCORB(PCI(pc)->pcop)->bit);
- }else
+ } else
SAFE_snprintf(&s,&size,"%s,0 ; ?bug", get_op_from_instruction(PCI(pc)));
//PCI(pc)->pcop->t.bit );
} else {
else
SAFE_snprintf(&s,&size,"(1 << (%s & 7))",get_op_from_instruction(PCI(pc)));
- }else {
+ } else {
SAFE_snprintf(&s,&size,"%s",get_op_from_instruction(PCI(pc)));
if( PCI(pc)->num_ops == 2)
case PC_OPCODE:
// If the opcode has a label, print that first
{
- pBranch *pbl = PCI(pc)->label;
+ char str[256];
+ pCodeInstruction *pci = PCI(pc);
+ pBranch *pbl = pci->label;
while(pbl && pbl->pc) {
if(pbl->pc->type == PC_LABEL)
pCodePrintLabel(of, pbl->pc);
pbl = pbl->next;
}
- }
- if(PCI(pc)->cline)
- genericPrint(of,PCODE(PCI(pc)->cline));
+ if(pci->cline)
+ genericPrint(of,PCODE(pci->cline));
- {
- char str[256];
pCode2str(str, 256, pc);
/* Debug */
if(debug_verbose) {
+ pCodeOpReg *pcor = PCOR(pci->pcop);
fprintf(of, "\t;id=%u,key=%03x",pc->id,pc->seq);
- if(PCI(pc)->pcflow)
- fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+ if(pci->pcflow)
+ fprintf(of,",flow seq=%03x",pci->pcflow->pc.seq);
+ if (pcor && pcor->pcop.type==PO_GPR_TEMP && !pcor->r->isFixed)
+ fprintf(of,",rIdx=r0x%X",pcor->rIdx);
}
}
#if 0
/*-----------------------------------------------------------------*/
regs * getRegFromInstruction(pCode *pc)
{
-
+ regs *r;
if(!pc ||
!isPCI(pc) ||
!PCI(pc)->pcop ||
case PO_INDF:
case PO_FSR:
return PCOR(PCI(pc)->pcop)->r;
-
- // return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
-
+
case PO_BIT:
case PO_GPR_TEMP:
- //fprintf(stderr, "getRegFromInstruction - bit or temp\n");
return PCOR(PCI(pc)->pcop)->r;
case PO_IMMEDIATE:
- if(PCOI(PCI(pc)->pcop)->r)
- return (PCOI(PCI(pc)->pcop)->r);
-
- //fprintf(stderr, "getRegFromInstruction - immediate\n");
+ r = PCOI(PCI(pc)->pcop)->r;
+ if (r)
+ return r;
return dirregWithName(PCI(pc)->pcop->name);
- //return NULL; // PCOR(PCI(pc)->pcop)->r;
case PO_GPR_BIT:
- return PCOR(PCI(pc)->pcop)->r;
+ r = PCOR(PCI(pc)->pcop)->r;
+ if (r)
+ return r;
+ return dirregWithName(PCI(pc)->pcop->name);
case PO_GPR_REGISTER:
case PO_DIR:
- //fprintf(stderr, "getRegFromInstruction - dir\n");
- return PCOR(PCI(pc)->pcop)->r;
+ r = PCOR(PCI(pc)->pcop)->r;
+ if (r)
+ return r;
+ return dirregWithName(PCI(pc)->pcop->name);
case PO_LITERAL:
- //fprintf(stderr, "getRegFromInstruction - literal\n");
break;
default:
- //fprintf(stderr, "getRegFromInstruction - unknown reg type %d\n",PCI(pc)->pcop->type);
- //genericPrint(stderr, pc);
break;
}
*/
/*-----------------------------------------------------------------*/
+/* Inserts a new pCodeInstruction before an existing one */
/*-----------------------------------------------------------------*/
-static void pCodeInstructionInsertAfter(pCodeInstruction *pci, pCodeInstruction *new_pci)
+static void insertPCodeInstruction(pCodeInstruction *pci, pCodeInstruction *new_pci)
{
pCodeInsertAfter(pci->pc.prev, &new_pci->pc);
new_pc = newpCode((Set_Clear?POC_BSF:POC_BCF),popCopyGPR2Bit(PCOP(&pc_status),RP_BankBit));
- pCodeInstructionInsertAfter(pci, PCI(new_pc));
+ insertPCodeInstruction(pci, PCI(new_pc));
}
/*-----------------------------------------------------------------*/
pcop->name = strdup(name);
new_pc = newpCode(POC_BANKSEL, pcop);
- pCodeInstructionInsertAfter(pci, PCI(new_pc));
+ insertPCodeInstruction(pci, PCI(new_pc));
}
/*-----------------------------------------------------------------*/
insertBankSel(pci, reg->name); // Let linker choose the bank selection
} else if ((cur_bank == -1)||(cur_bank == 'L')||(cur_bank == 'E')) { // Current bank unknown and new register bank is known then can set bank bits
insertBankSwitch(pci, bank&1, PIC_RP0_BIT);
- insertBankSwitch(pci, bank&2, PIC_RP1_BIT);
+ if (getMaxRam()&0x100)
+ insertBankSwitch(pci, bank&2, PIC_RP1_BIT);
} else { // Current bank and new register banks known - can set bank bits
switch((cur_bank^bank) & 3) {
case 0:
break;
case 3:
insertBankSwitch(pci, bank&1, PIC_RP0_BIT);
- insertBankSwitch(pci, bank&2, PIC_RP1_BIT);
+ if (getMaxRam()&0x100)
+ insertBankSwitch(pci, bank&2, PIC_RP1_BIT);
break;
}
}
} else if (PCI(pc)->op == POC_BANKSEL) {
int old_bank = *cur_bank;
- *cur_bank = (PCOR(PCI(pc)->pcop)->r->isExtern) ? 'E' : 'L';
+ regs *r = PCOR(PCI(pc)->pcop)->r;
+ *cur_bank = (!r || r->isExtern) ? 'E' : 'L';
LastRegIdx = reg->rIdx;
return old_bank != *cur_bank;
}
reg = getRegFromInstruction(pc);
if (reg) {
-
if (IsBankChange(pc,reg,&cur_bank))
return cur_bank;
-
if (!isPCI_LIT(pc)) {
- /* Examine the instruction before this one to make sure it is
+ /* Examine the instruction before this one to make sure it is
* not a skip type instruction */
pcprev = findPrevpCode(pc->prev, PC_OPCODE);
pBlock *pb;
if(!picIsInitialized()) {
- fprintf(stderr,"Temporary ERROR: at the moment you have to use\n");
- fprintf(stderr,"an include file create by inc2h.pl. See SDCC source:\n");
- fprintf(stderr,"support/scripts/inc2h.pl\n");
- fprintf(stderr,"this is a nuisance bug that will be fixed shortly\n");
-
- exit(1);
+ setDefMaxRam(); // Max RAM has not been included, so use default setting
}
/* Phase x - Flow Analysis - Used Banks
/*-----------------------------------------------------------------*/
DEFSETFUNC (resetrIdx)
{
- if (!((regs *)item)->isFixed)
- ((regs *)item)->rIdx = 0;
+ regs *r = (regs *)item;
+ if (!r->isFixed) {
+ r->rIdx = 0;
+ }
return 0;
}
projects / fw / sdcc / blobdiff