// Eventually this will go into device dependent files:
-pCodeOpReg pc_status = {{PO_STATUS, "_STATUS"}, -1, NULL,0,NULL};
+pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL};
pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL};
pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL};
pCodeOpReg pc_intcon = {{PO_INTCON, ""}, -1, NULL,0,NULL};
pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL};
-pCodeOpReg pc_pclath = {{PO_PCLATH, "_PCLATH"}, -1, NULL,0,NULL};
+pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL};
pCodeOpReg pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL};
pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL};
pCodeOpReg pc_ssave = {{PO_GPR_REGISTER, "SSAVE"}, -1, NULL,0,NULL};
+pCodeOpReg pc_psave = {{PO_GPR_REGISTER, "PSAVE"}, -1, NULL,0,NULL};
static int mnemonics_initialized = 0;
static int functionInlining = 1; /* inline functions if nonzero */
int debug_verbose = 0; /* Set true to inundate .asm file */
-static int GpCodeSequenceNumber = 1;
+// static int GpCodeSequenceNumber = 1;
int GpcFlowSeq = 1;
extern void RemoveUnusedRegisters(void);
static void pCodePrintFunction(FILE *of, pCode *pc);
static void pCodeOpPrint(FILE *of, pCodeOp *pcop);
static char *get_op_from_instruction( pCodeInstruction *pcc);
-char *get_op( pCodeOp *pcop,char *buff,int buf_size);
+char *get_op( pCodeOp *pcop,char *buff,size_t buf_size);
int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd);
int pCodePeepMatchRule(pCode *pc);
void pBlockStats(FILE *of, pBlock *pb);
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,1, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_BSF,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_REGISTER // outCond
2, // num ops
1,1, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_BCF,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
(PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond
2, // num ops
0,1, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_BTFSS,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_EXAMINE_PCOP // outCond
2, // num ops
0,1, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_BTFSC,
(PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond
PCC_EXAMINE_PCOP // outCond
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_REGISTER // outCond
0, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_W // outCond
0, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_REGISTER // outCond
2, // num ops
0,0, // dest, bit instruction
1,1, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_W // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
PCC_Z // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_REGISTER, // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_W, // inCond
PCC_REGISTER // outCond
pCodeInstruction pciMOVLW = {
{PC_OPCODE, NULL, NULL, 0, NULL,
- // genericAnalyze,
genericDestruct,
genericPrint},
POC_MOVLW,
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_NONE | PCC_LITERAL), // inCond
PCC_W // outCond
0, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
0, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond (not true... affects the GIE bit too)
1, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 1, // literal operand
POC_NOP,
PCC_LITERAL, // inCond
PCC_W // outCond
0, // num ops
0,0, // dest, bit instruction
1,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_NONE // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_C | PCC_REGISTER), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_REGISTER), // inCond
(PCC_REGISTER) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_REGISTER), // inCond
(PCC_W) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
PCC_NONE, // inCond
PCC_REGISTER // outCond
2, // num ops
1,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_REGISTER | PCC_Z) // outCond
2, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 0, // literal operand
POC_NOP,
(PCC_W | PCC_REGISTER), // inCond
(PCC_W | PCC_Z) // outCond
1, // num ops
0,0, // dest, bit instruction
0,0, // branch, skip
+ 1, // literal operand
POC_NOP,
(PCC_W | PCC_LITERAL), // inCond
(PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond
#define MAX_PIC14MNEMONICS 100
pCodeInstruction *pic14Mnemonics[MAX_PIC14MNEMONICS];
-/* This definition needs to be part of configure.in */
-// #define USE_VSNPRINTF
-#ifdef USE_VSNPRINTF
+#ifdef HAVE_VSNPRINTF
// Alas, vsnprintf is not ANSI standard, and does not exist
// on Solaris (and probably other non-Gnu flavored Unixes).
va_end (val);
len = strlen(*str);
- if(len > *size) {
+ if((size_t)len > *size) {
fprintf(stderr,"WARNING, it looks like %s has overflowed\n",__FUNCTION__);
- fprintf(stderr,"len = %d is > str size %d\n",len,*size);
+ fprintf(stderr,"len = %d is > str size %d\n",len,(int)*size);
}
*str += len;
}
-#else // USE_VSNPRINTF
+#else // HAVE_VSNPRINTF
// This version is *not* safe, despite the name.
}
-#endif // USE_VSNPRINTF
+#endif // HAVE_VSNPRINTF
extern void initStack(int base_address, int size);
void pCodeInitRegisters(void)
{
static int initialized=0;
+ int shareBankAddress;
if(initialized)
return;
initStack(0xfff, 8);
init_pic(port->processor);
- pc_status.r = allocProcessorRegister(IDX_STATUS,"_STATUS", PO_STATUS, 0x80);
+ pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80);
pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80);
- pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"_PCLATH", PO_PCLATH, 0x80);
+ pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80);
pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x80);
pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80);
pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80);
pc_pcl.rIdx = IDX_PCL;
pc_pclath.rIdx = IDX_PCLATH;
- pc_kzero.r = allocInternalRegister(IDX_KZ,"KZ",PO_GPR_REGISTER,0);
- pc_ssave.r = allocInternalRegister(IDX_SSAVE,"SSAVE", PO_GPR_REGISTER, 0x80);
- pc_wsave.r = allocInternalRegister(IDX_WSAVE,"WSAVE", PO_GPR_REGISTER, 0);
+ pc_kzero.r = allocInternalRegister(IDX_KZ,"KZ",PO_GPR_REGISTER,0); /* Known Zero - actually just a general purpose reg. */
+ pc_wsave.r = allocInternalRegister(IDX_WSAVE,"WSAVE", PO_GPR_REGISTER, 0x80); /* Interupt storage for working register - must be same address in all banks ie section SHAREBANK. */
+ pc_ssave.r = allocInternalRegister(IDX_SSAVE,"SSAVE", PO_GPR_REGISTER, 0); /* Interupt storage for status register. */
+ pc_psave.r = allocInternalRegister(IDX_PSAVE,"PSAVE", PO_GPR_REGISTER, 0); /* Interupt storage for pclath register. */
- pc_kzero.rIdx = IDX_KZ;
- pc_wsave.rIdx = IDX_WSAVE;
- pc_ssave.rIdx = IDX_SSAVE;
+ pc_kzero.rIdx = pc_kzero.r->rIdx;
+ pc_wsave.rIdx = pc_wsave.r->rIdx;
+ pc_ssave.rIdx = pc_ssave.r->rIdx;
+ pc_psave.rIdx = pc_psave.r->rIdx;
+
+ shareBankAddress = 0x7f; /* FIXME - this is different for some PICs ICs if the sharebank does not exist then this address needs to be reserved across all banks. */
+ pc_wsave.r->isFixed = 1;
+ pc_wsave.r->address = shareBankAddress;
/* probably should put this in a separate initialization routine */
pb_dead_pcodes = newpBlock();
if(getpBlock_dbName(pb) == dbName) {
pBlockStats(of,pb);
printpBlock(of,pb);
+ fprintf (of, "\n");
}
}
char buffer[100];
/* create the file name */
- strcpy(buffer,srcFileName);
+ strcpy(buffer,dstFileName);
strcat(buffer,".p");
if( !(pFile = fopen(buffer, "w" ))) {
if(!pcop)
return 0;
- if(pcop->type == PO_GPR_BIT && !strcmp(pcop->name, pc_status.pcop.name)) {
- switch(PCORB(pcop)->bit) {
- case PIC_C_BIT:
- return PCC_C;
- case PIC_DC_BIT:
- return PCC_DC;
- case PIC_Z_BIT:
- return PCC_Z;
- }
-
+ if (pcop->type == PO_GPR_BIT) {
+ char *name = pcop->name;
+ if (!name)
+ name = PCOR(pcop)->r->name;
+// if (strcmp(name, pc_status.pcop.name) != 0) { <<< This breaks the peep 2 optimisation
+ switch(PCORB(pcop)->bit) {
+ case PIC_C_BIT:
+ return PCC_C;
+ case PIC_DC_BIT:
+ return PCC_DC;
+ case PIC_Z_BIT:
+ return PCC_Z;
+ }
+// }
}
return 0;
else
s = name, key = label_key--;
+ PCOLAB(pcop)->offset = 0;
if(s)
pcop->name = Safe_strdup(s);
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
-pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space)
+pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space, int is_func)
{
pCodeOp *pcop;
pcop = Safe_calloc(1,sizeof(pCodeOpImmd) );
pcop->type = PO_IMMEDIATE;
if(name) {
- regs *r = dirregWithName(name);
+ regs *r = NULL;
pcop->name = Safe_strdup(name);
+
+ if(!is_func)
+ r = dirregWithName(name);
+
PCOI(pcop)->r = r;
if(r) {
//fprintf(stderr, " newpCodeOpImmd reg %s exists\n",name);
PCOI(pcop)->index = index;
PCOI(pcop)->offset = offset;
PCOI(pcop)->_const = code_space;
+ PCOI(pcop)->_function = is_func;
return pcop;
}
pCodeOp *newpCodeOpBit(char *s, int bit, int inBitSpace)
{
pCodeOp *pcop;
+ struct regs *r = 0;
pcop = Safe_calloc(1,sizeof(pCodeOpRegBit) );
pcop->type = PO_GPR_BIT;
- if(s)
- pcop->name = Safe_strdup(s);
- else
- pcop->name = NULL;
PCORB(pcop)->bit = bit;
PCORB(pcop)->inBitSpace = inBitSpace;
/* pCodeOpBit is derived from pCodeOpReg. We need to init this too */
- PCOR(pcop)->r = NULL;
- PCOR(pcop)->rIdx = 0;
+ if (s && !inBitSpace) {
+ r = dirregWithName(s);
+ if (!r) {
+ unsigned char idx = ((s[3] - (((s[3]>='0')&&(s[3]<='9'))?'0':'A'-10))<<4)|(s[4] - (((s[4]>='0')&&(s[4]<='9'))?'0':'A'-10));
+ r = pic14_regWithIdx(idx);
+ }
+ }
+ if (r) {
+ pcop->name = NULL;
+ PCOR(pcop)->r = r;
+ PCOR(pcop)->rIdx = r->rIdx;
+ } else {
+ pcop->name = Safe_strdup(s);
+ PCOR(pcop)->r = NULL;
+ PCOR(pcop)->rIdx = 0;
+ }
return pcop;
}
pcop = newpCodeOpReg(-1);
break;
+ case PO_GPR_POINTER:
case PO_GPR_REGISTER:
if(name)
pcop = newpCodeOpRegFromStr(name);
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
-char *get_op(pCodeOp *pcop,char *buffer, int size)
+char *get_op(pCodeOp *pcop,char *buffer, size_t size)
{
regs *r;
static char b[50];
SAFE_snprintf(&buffer,&size,"%s",PCOR(pcop)->r->name);
return buffer;
}
- return PCOR(pcop)->r->name;
+ //return PCOR(pcop)->r->name;
+ return pcop->name;
break;
case PO_GPR_TEMP:
r = pic14_regWithIdx(PCOR(pcop)->r->rIdx);
if(PCOI(pcop)->_const) {
if( PCOI(pcop)->offset && PCOI(pcop)->offset<4) {
- SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)",
- pcop->name,
- PCOI(pcop)->index,
- 8 * PCOI(pcop)->offset );
+ switch(PCOI(pcop)->offset) {
+ case 0:
+ SAFE_snprintf(&s,&size,"low %s",pcop->name);
+ break;
+ case 1:
+ SAFE_snprintf(&s,&size,"high %s",pcop->name);
+ break;
+ default:
+ SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)",
+ pcop->name,
+ PCOI(pcop)->index,
+ 8 * PCOI(pcop)->offset );
+ }
} else
SAFE_snprintf(&s,&size,"LOW(%s+%d)",pcop->name,PCOI(pcop)->index);
} else {
SAFE_snprintf(&s,&size,"(%s + %d)",
pcop->name,
PCOI(pcop)->index );
- } else
- SAFE_snprintf(&s,&size,"%s",pcop->name);
+ } else {
+ switch(PCOI(pcop)->offset) {
+ case 0:
+ SAFE_snprintf(&s,&size,"%s",pcop->name);
+ break;
+ case 1:
+ SAFE_snprintf(&s,&size,"high %s",pcop->name);
+ break;
+ default:
+ SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset);
+ }
+ }
}
return buffer;
SAFE_snprintf(&s,&size,"%s",pcop->name);
return buffer;
+ case PO_LABEL:
+ s = buffer;
+ if (pcop->name) {
+ if(PCOLAB(pcop)->offset == 1)
+ SAFE_snprintf(&s,&size,"HIGH(%s)",pcop->name);
+ else
+ SAFE_snprintf(&s,&size,"%s",pcop->name);
+ }
+ return buffer;
+
default:
if (pcop->name) {
if(use_buffer) {
if(pcc )
return get_op(pcc->pcop,NULL,0);
-
+
+ /* gcc 3.2: warning: concatenation of string literals with __FUNCTION__ is deprecated
return ("ERROR Null: "__FUNCTION__);
+ */
+ return ("ERROR Null: get_op_from_instruction");
}
/*-----------------------------------------------------------------*/
/*-----------------------------------------------------------------*/
-char *pCode2str(char *str, int size, pCode *pc)
+char *pCode2str(char *str, size_t size, pCode *pc)
{
char *s = str;
if(PCI(pc)->isBitInst) {
if(PCI(pc)->pcop->type == PO_GPR_BIT) {
- if( (((pCodeOpRegBit *)(PCI(pc)->pcop))->inBitSpace) )
- SAFE_snprintf(&s,&size,"(%s >> 3), (%s & 7)",
- PCI(pc)->pcop->name ,
- PCI(pc)->pcop->name );
- else
- SAFE_snprintf(&s,&size,"%s,%d", get_op_from_instruction(PCI(pc)),
- (((pCodeOpRegBit *)(PCI(pc)->pcop))->bit ));
+ char *name = PCI(pc)->pcop->name;
+ if (!name)
+ name = PCOR(PCI(pc)->pcop)->r->name;
+ if( (((pCodeOpRegBit *)(PCI(pc)->pcop))->inBitSpace) )
+ SAFE_snprintf(&s,&size,"(%s >> 3), (%s & 7)", name, name);
+ else
+ SAFE_snprintf(&s,&size,"%s,%d", name,
+ (((pCodeOpRegBit *)(PCI(pc)->pcop))->bit)&7);
} else if(PCI(pc)->pcop->type == PO_GPR_BIT) {
SAFE_snprintf(&s,&size,"%s,%d", get_op_from_instruction(PCI(pc)),PCORB(PCI(pc)->pcop)->bit);
}else
/* Is this an instruction with operands? */
if(pc->type == PC_OPCODE && PCI(pc)->pcop) {
- if(PCI(pc)->pcop->type == PO_GPR_TEMP) {
+ if((PCI(pc)->pcop->type == PO_GPR_TEMP)
+ || ((PCI(pc)->pcop->type == PO_GPR_BIT) && PCOR(PCI(pc)->pcop)->r && (PCOR(PCI(pc)->pcop)->r->pc_type == PO_GPR_TEMP))) {
/* Loop through all of the registers declared so far in
this block and see if we find this one there */
}
#endif
- if((reg && REG_BANK(reg)!=cur_bank) ||
- ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) )) {
+ if( ( (reg && REG_BANK(reg)!=cur_bank) ||
+ ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) &&
+ (!isPCI_LIT(pc)) ){
/* Examine the instruction before this one to make sure it is
* not a skip type instruction */
}
#endif
- if((reg && REG_BANK(reg)!=cur_bank) ||
- ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) )) {
+ if( ( (reg && REG_BANK(reg)!=cur_bank) ||
+ ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) &&
+ (!isPCI_LIT(pc)) ){
+
/* Examine the instruction before this one to make sure it is
* not a skip type instruction */
}
+// Undefine REUSE_GPR in files pcode.c & device.c to prevent local function registers being reused.
+#define REUSE_GPR
+#ifdef REUSE_GPR
+/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*/
+DEFSETFUNC (resetrIdx)
+{
+ if (!((regs *)item)->isFixed)
+ ((regs *)item)->rIdx = 0;
+
+ return 0;
+}
+
+pCode *findFunction(char *fname);
+
+/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*/
+unsigned register_reassign(pBlock *pb, unsigned idx)
+{
+ pCode *pc;
+
+ /* check recursion */
+ pc = setFirstItem(pb->function_entries);
+ if(!pc)
+ return idx;
+
+ DFPRINTF((stderr," reassigning registers for function \"%s\"\n",PCF(pc)->fname));
+
+ if (pb->tregisters) {
+ regs *r;
+ for (r = setFirstItem(pb->tregisters); r; r = setNextItem(pb->tregisters)) {
+ if (r->type == REG_GPR) {
+ if (!r->isFixed) {
+ if (r->rIdx < (int)idx) {
+ char s[20];
+ r->rIdx = idx++;
+ sprintf(s,"r0x%02X", r->rIdx);
+ DFPRINTF((stderr," reassigning register \"%s\" to \"%s\"\n",r->name,s));
+ free(r->name);
+ r->name = Safe_strdup(s);
+ }
+ }
+ }
+ }
+ }
+ for(pc = setFirstItem(pb->function_calls); pc; pc = setNextItem(pb->function_calls)) {
+
+ if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) {
+ char *dest = get_op_from_instruction(PCI(pc));
+
+ pCode *pcn = findFunction(dest);
+ if(pcn) {
+ register_reassign(pcn->pb,idx);
+ }
+ }
+
+ }
+
+ return idx;
+}
+
+/*-----------------------------------------------------------------*/
+/* Re-allocate the GPR for optimum reuse for a given pblock */
+/* eg if a function m() calls function f1() and f2(), where f1 */
+/* allocates a local variable vf1 and f2 allocates a local */
+/* variable vf2. Then providing f1 and f2 do not call each other */
+/* they may share the same general purpose registers for vf1 and */
+/* vf2. */
+/* This is done by first setting the the regs rIdx to start after */
+/* all the global variables, then walking through the call tree */
+/* renaming the registers to match their new idx and incrementng */
+/* it as it goes. If a function has already been called it will */
+/* only rename the registers if it has already used up those */
+/* registers ie rIdx of the function's registers is lower than the */
+/* current rIdx. That way the register will not be reused while */
+/* still being used by an eariler function call. */
+/*-----------------------------------------------------------------*/
+void register_reusage(pBlock *mainPb)
+{
+ static int exercised = 0;
+ if (!exercised) { /* Only do this once */
+ /* Find end of statically allocated variables for start idx */
+ unsigned idx = 0x20; /* Start from begining of GPR. Note may not be 0x20 on some PICs */
+ regs *r;
+ for (r = setFirstItem(dynDirectRegs); r; r = setNextItem(dynDirectRegs)) {
+ if (r->type != REG_SFR) {
+ idx += r->size; /* Increment for all statically allocated variables */
+ }
+ }
+
+ applyToSet(dynAllocRegs,resetrIdx); /* Reset all rIdx to zero. */
+
+ if (mainPb)
+ idx = register_reassign(mainPb,idx); /* Do main and all the functions that are called from it. */
+ idx = register_reassign(the_pFile->pbHead,idx); /* Do the other functions such as interrupts. */
+ }
+ exercised++;
+}
+#endif // REUSE_GPR
+
/*-----------------------------------------------------------------*/
/* buildCallTree - look at the flow and extract all of the calls */
/* */
/*-----------------------------------------------------------------*/
set *register_usage(pBlock *pb);
+
void buildCallTree(void )
{
pBranch *pbr;
- pBlock *pb;
+ pBlock *pb, *mainPb = 0;
pCode *pc;
if(!the_pFile)
return;
-
-
/* Now build the call tree.
First we examine all of the pCodes for functions.
Keep in mind that the function boundaries coincide
pCode *pc_fstart=NULL;
for(pc = pb->pcHead; pc; pc = pc->next) {
if(isPCF(pc)) {
- if (PCF(pc)->fname) {
+ pCodeFunction *pcf = PCF(pc);
+ if (pcf->fname) {
- if(STRCASECMP(PCF(pc)->fname, "_main") == 0) {
- //fprintf(stderr," found main \n");
- pb->cmemmap = NULL; /* FIXME do we need to free ? */
- pb->dbName = 'M';
- }
+ if(STRCASECMP(pcf->fname, "_main") == 0) {
+ //fprintf(stderr," found main \n");
+ pb->cmemmap = NULL; /* FIXME do we need to free ? */
+ pb->dbName = 'M';
+ mainPb = pb;
+ }
- pbr = Safe_calloc(1,sizeof(pBranch));
- pbr->pc = pc_fstart = pc;
- pbr->next = NULL;
+ pbr = Safe_calloc(1,sizeof(pBranch));
+ pbr->pc = pc_fstart = pc;
+ pbr->next = NULL;
- the_pFile->functions = pBranchAppend(the_pFile->functions,pbr);
+ the_pFile->functions = pBranchAppend(the_pFile->functions,pbr);
- // Here's a better way of doing the same:
- addSet(&pb->function_entries, pc);
+ // Here's a better way of doing the same:
+ addSet(&pb->function_entries, pc);
- } else {
- // Found an exit point in a function, e.g. return
- // (Note, there may be more than one return per function)
- if(pc_fstart)
- pBranchLink(PCF(pc_fstart), PCF(pc));
+ } else {
+ // Found an exit point in a function, e.g. return
+ // (Note, there may be more than one return per function)
+ if(pc_fstart)
+ pBranchLink(PCF(pc_fstart), pcf);
- addSet(&pb->function_exits, pc);
- }
+ addSet(&pb->function_exits, pc);
+ }
} else if(isCALL(pc)) {
- addSet(&pb->function_calls,pc);
+ addSet(&pb->function_calls,pc);
}
}
}
+#ifdef REUSE_GPR
+ register_reusage(mainPb); /* Comment out this line to prevent local function registers being reused. Note from this point onwards finding a GPR by its rIdx value will no longer work.*/
+#endif // REUSE_GPR
+
/* Re-allocate the registers so that there are no collisions
* between local variables when one function call another */
projects / fw / sdcc / blobdiff