* src/port.h,

[fw/sdcc] / src / mcs51 / main.c

diff --git a/src/mcs51/main.c b/src/mcs51/main.c
index 5aaa53ece3efacae6e6feae813d409d9c9882f56..dfda28221c3e92b2343fd3c97df685d965436136 100644 (file)
--- a/src/mcs51/main.c
+++ b/src/mcs51/main.c
@@ -8,6 +8,7 @@
 #include "main.h"
 #include "ralloc.h"
 #include "gen.h"
+#include "../SDCCutil.h"
 
 static char _defaultRules[] =
 {
@@ -64,13 +65,31 @@ _mcs51_reset_regparm ()
 static int
 _mcs51_regparm (sym_link * l)
 {
-  /* for this processor it is simple
-     can pass only the first parameter in a register */
-  if (regParmFlg)
-    return 0;
+    if (options.parms_in_bank1 == 0) {
+       /* simple can pass only the first parameter in a register */
+       if (regParmFlg)
+           return 0;
 
-  regParmFlg = 1;
-  return 1;
+       regParmFlg = 1;
+       return 1;
+    } else {
+       int size = getSize(l);
+       int remain ;
+
+       /* first one goes the usual way to DPTR */
+       if (regParmFlg == 0) {
+           regParmFlg += 4 ;
+           return 1;
+       }
+       /* second one onwards goes to RB1_0 thru RB1_7 */
+        remain = regParmFlg - 4;
+       if (size > (8 - remain)) {
+           regParmFlg = 12 ;
+           return 0;
+       }
+       regParmFlg += size ;
+       return regParmFlg - size + 1;   
+    }
 }
 
 static bool
@@ -85,6 +104,10 @@ _mcs51_parseOptions (int *pargc, char **argv, int *i)
 static void
 _mcs51_finaliseOptions (void)
 {
+  if (options.noXinitOpt) {
+    port->genXINIT=0;
+  }
+
   if (options.model == MODEL_LARGE) {
       port->mem.default_local_map = xdata;
       port->mem.default_globl_map = xdata;
@@ -94,6 +117,10 @@ _mcs51_finaliseOptions (void)
       port->mem.default_local_map = data;
       port->mem.default_globl_map = data;
     }
+
+  if (options.parms_in_bank1) {
+      addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
+  }
 }
 
 static void
@@ -112,6 +139,11 @@ _mcs51_getRegName (struct regs *reg)
 static void
 _mcs51_genAssemblerPreamble (FILE * of)
 {
+    if (options.parms_in_bank1) {
+       int i ;
+       for (i=0; i < 8 ; i++ )
+           fprintf (of,"b1_%d = 0x%x \n",i,8+i);
+    }
 }
 
 /* Generate interrupt vector table. */
@@ -125,14 +157,11 @@ _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
 static void _mcs51_genXINIT (FILE * of) {
   fprintf (of, ";      _mcs51_genXINIT() start\n");
   fprintf (of, "       mov     a,#l_XINIT\n");
-  fprintf (of, "       orl     a,#l_XINIT>>8\n");
-  fprintf (of, "       jz      00003$\n");
-  fprintf (of, "       mov     a,#s_XINIT\n");
-  fprintf (of, "       add     a,#l_XINIT\n");
   fprintf (of, "       mov     r1,a\n");
-  fprintf (of, "       mov     a,#s_XINIT>>8\n");
-  fprintf (of, "       addc    a,#l_XINIT>>8\n");
-  fprintf (of, "       mov     r2,a\n");
+  fprintf (of, "       mov     r2,#(l_XINIT >> 8)\n");
+  fprintf (of, "       orl     a,r2\n");
+  fprintf (of, "       jz      00003$\n");
+  fprintf (of, "       inc     r2\n");  
   fprintf (of, "       mov     dptr,#s_XINIT\n");
   fprintf (of, "       mov     r0,#s_XISEG\n");
   fprintf (of, "       mov     p2,#(s_XISEG >> 8)\n");
@@ -143,10 +172,8 @@ static void _mcs51_genXINIT (FILE * of) {
   fprintf (of, "       inc     r0\n");
   fprintf (of, "       cjne    r0,#0,00002$\n");
   fprintf (of, "       inc     p2\n");
-  fprintf (of, "00002$:        mov     a,dpl\n");
-  fprintf (of, "       cjne    a,ar1,00001$\n");
-  fprintf (of, "       mov     a,dph\n");
-  fprintf (of, "       cjne    a,ar2,00001$\n");
+  fprintf (of, "00002$:        djnz    r1,00001$\n");
+  fprintf (of, "       djnz    r2,00001$\n");
   fprintf (of, "       mov     p2,#0xFF\n");
   fprintf (of, "00003$:\n");
   fprintf (of, ";      _mcs51_genXINIT() end\n");
@@ -175,6 +202,30 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
     return 1;
 }
 
+/* Indicate which extended bit operations this port supports */
+static bool
+hasExtBitOp (int op, int size)
+{
+  if (op == RRC
+      || op == RLC
+      || op == GETHBIT
+      || (op == SWAP && size <= 2)
+     )
+    return TRUE;
+  else
+    return FALSE;
+}
+
+/* Indicate the expense of an access to an output storage class */
+static int
+oclsExpense (struct memmap *oclass)
+{
+  if (IN_FARSPACE(oclass))
+    return 1;
+    
+  return 0;
+}
+
 /** $1 is always the basename.
     $2 is always the output file.
     $3 varies
@@ -183,13 +234,13 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
 */
 static const char *_linkCmd[] =
 {
-  "{bindir}{sep}aslink", "-nf", "$1", NULL
+  "aslink", "-nf", "\"$1\"", NULL
 };
 
 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
 static const char *_asmCmd[] =
 {
-  "asx8051", "$l", "$3", "$1.asm", NULL
+  "asx8051", "$l", "$3", "\"$1.asm\"", NULL
 };
 
 /* Globals */
@@ -198,7 +249,9 @@ PORT mcs51_port =
   TARGET_ID_MCS51,
   "mcs51",
   "MCU 8051",                  /* Target name */
+  NULL,                                /* Processor name */
   {
+    glue,
     TRUE,                      /* Emit glue around main */
     MODEL_SMALL | MODEL_LARGE,
     MODEL_SMALL
@@ -209,7 +262,8 @@ PORT mcs51_port =
     "-plosgffc",               /* Options with debug */
     "-plosgff",                        /* Options without debug */
     0,
-    ".asm"
+    ".asm",
+    NULL                       /* no do_assemble function */
   },
   {
     _linkCmd,
@@ -243,8 +297,9 @@ PORT mcs51_port =
     NULL,
     1
   },
+  { NULL, NULL },
   {
-    +1, 1, 4, 1, 1, 0
+    +1, 0, 4, 1, 1, 0
   },
     /* mcs51 has an 8 bit mul */
   {
@@ -253,12 +308,14 @@ PORT mcs51_port =
   "_",
   _mcs51_init,
   _mcs51_parseOptions,
+  NULL,
   _mcs51_finaliseOptions,
   _mcs51_setDefaultOptions,
   mcs51_assignRegisters,
   _mcs51_getRegName,
   _mcs51_keywords,
   _mcs51_genAssemblerPreamble,
+  NULL,                                /* no genAssemblerEnd */
   _mcs51_genIVT,
   _mcs51_genXINIT,
   _mcs51_reset_regparm,
@@ -266,7 +323,10 @@ PORT mcs51_port =
   NULL,
   NULL,
   NULL,
+  hasExtBitOp,                 /* hasExtBitOp */
+  oclsExpense,                 /* oclsExpense */
   FALSE,
+  TRUE,                                /* little endian */
   0,                           /* leave lt */
   0,                           /* leave gt */
   1,                           /* transform <= to ! > */