* src/mcs51/gen.c (genReceive): fixed bug 1788177

[fw/sdcc] / src / mcs51 / gen.c

diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c
index cb42cdeb452318abcb8b476399b5a11f9d480c34..20fefb21ba42e0f4f4840a65f9b65583bf819485 100644 (file)
--- a/src/mcs51/gen.c
+++ b/src/mcs51/gen.c
@@ -6634,8 +6634,15 @@ genAnd (iCode * ic, iCode * ifx)
           if (AOP_TYPE (right) == AOP_CRY)
             {
               // c = bit & bit;
-              emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir);
-              emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir);
+              if (IS_OP_ACCUSE (left))
+                {
+                  emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir);
+                }
+                         else
+                {
+                  emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir);
+                  emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir);
+                }
             }
           else
             {
@@ -7056,8 +7063,15 @@ genOr (iCode * ic, iCode * ifx)
           if (AOP_TYPE (right) == AOP_CRY)
             {
               // c = bit | bit;
-              emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir);
-              emitcode ("orl", "c,%s", AOP (left)->aopu.aop_dir);
+              if (IS_OP_ACCUSE (left))
+                {
+                  emitcode ("orl", "c,%s", AOP (right)->aopu.aop_dir);
+                }
+                         else
+                {
+                  emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir);
+                  emitcode ("orl", "c,%s", AOP (left)->aopu.aop_dir);
+                }
             }
           else
             {
@@ -11616,7 +11630,10 @@ genReceive (iCode * ic)
     }
   else if (ic->argreg > 12)
     { /* bit parameters */
-      if (OP_SYMBOL (IC_RESULT (ic))->regs[0]->rIdx != ic->argreg-5)
+      regs *reg = OP_SYMBOL (IC_RESULT (ic))->regs[0];
+
+      BitBankUsed = 1;
+      if (!reg || reg->rIdx != ic->argreg-5)
         {
           aopOp (IC_RESULT (ic), ic, FALSE);
           emitcode ("mov", "c,%s", rb1regs[ic->argreg-5]);