#ifndef _AO_ARCH_FUNCS_H_
#define _AO_ARCH_FUNCS_H_
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
#define ao_enable_port(port) (lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
-#define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
+#define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1UL << LPC_SCB_SYSAHBCLKCTRL_GPIO))
#define lpc_all_bit(port,bit) (((port) << 5) | (bit))
-#define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
+#define ao_gpio_set(port, bit, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
-#define ao_gpio_get(port, bit, pin) (lpc_gpio.byte[lpc_all_bit(port,bit)])
+#define ao_gpio_get(port, bit) (lpc_gpio.byte[lpc_all_bit(port,bit)])
#define PORT0_JTAG_REGS ((1 << 11) | (1 << 12) | (1 << 14))
}
}
-#define ao_enable_output(port,bit,pin,v) do { \
+#define ao_enable_output(port,bit,v) do { \
ao_enable_port(port); \
lpc_set_gpio(port,bit); \
- ao_gpio_set(port, bit, pin, v); \
+ ao_gpio_set(port, bit, v); \
lpc_gpio.dir[port] |= (1 << bit); \
} while (0)
#define ao_enable_input(port,bit,mode) do { \
ao_enable_port(port); \
lpc_set_gpio(port,bit); \
- lpc_gpio.dir[port] &= ~(1 << bit); \
+ lpc_gpio.dir[port] &= ~(1UL << bit); \
ao_gpio_set_mode(port,bit,mode); \
} while (0)
#define ao_enable_analog(port,bit,id) do { \
ao_enable_port(port); \
- lpc_gpio.dir[port] &= ~(1 << bit); \
+ lpc_gpio.dir[port] &= ~(1UL << bit); \
lpc_ioconf.analog_reg(port,bit) = ((analog_func(id) << LPC_IOCONF_FUNC) | \
(0 << LPC_IOCONF_ADMODE)); \
} while (0)
}
static inline void
-ao_arch_memory_barrier() {
+ao_arch_memory_barrier(void) {
asm volatile("" ::: "memory");
}
#if HAS_TASK
static inline void
-ao_arch_init_stack(struct ao_task *task, void *start)
+ao_arch_init_stack(struct ao_task *task, uint32_t *sp, void *start)
{
- uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE);
uint32_t a = (uint32_t) start;
int i;
/* PRIMASK with interrupts enabled */
ARM_PUSH32(sp, 0);
- task->sp = sp;
+ task->sp32 = sp;
}
static inline void ao_arch_save_regs(void) {
static inline void ao_arch_save_stack(void) {
uint32_t *sp;
asm("mov %0,sp" : "=&r" (sp) );
- ao_cur_task->sp = (sp);
- if ((uint8_t *) sp < &ao_cur_task->stack[0])
+ ao_cur_task->sp32 = (sp);
+ if (sp < &ao_cur_task->stack32[0])
ao_panic (AO_PANIC_STACK);
}
static inline void ao_arch_restore_stack(void) {
- uint32_t sp;
- sp = (uint32_t) ao_cur_task->sp;
-
/* Switch stacks */
- asm("mov sp, %0" : : "r" (sp) );
+ asm("mov sp, %0" : : "r" (ao_cur_task->sp32) );
/* Restore PRIMASK */
asm("pop {r0}");
ao_spi_put(bus); \
} while (0)
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
void
ao_spi_get(uint8_t spi_index, uint32_t speed);
uint8_t __bit__; \
for (__bit__ = 0; __bit__ < 32; __bit__++) { \
if (mask & (1 << __bit__)) \
- ao_enable_output(port, __bit__, PIN, 1); \
+ ao_enable_output(port, __bit__, 1); \
} \
} while (0)
+void
+ao_debug_out(char c);
+
#define HAS_ARCH_START_SCHEDULER 1
static inline void ao_arch_start_scheduler(void) {
asm("isb");
}
+void start(void);
+
#endif /* _AO_ARCH_FUNCS_H_ */