} while (0)
#define ao_enable_input(port,bit,mode) do { \
+ vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit)); \
+ vuint32_t _mode; \
ao_enable_port(port); \
lpc_gpio.dir[port] &= ~(1 << bit); \
if (mode == AO_EXTI_MODE_PULL_UP) \
- stm_pupdr_set(port, bit, STM_PUPDR_PULL_UP); \
+ _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
else if (mode == AO_EXTI_MODE_PULL_DOWN) \
- stm_pupdr_set(port, bit, STM_PUPDR_PULL_DOWN); \
+ _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
else \
- stm_pupdr_set(port, bit, STM_PUPDR_NONE); \
+ _mode = LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE; \
+ *_ioconf = ((*_ioconf & ~(LPC_IOCONF_MODE_MASK << LPC_IOCONF_MODE)) | \
+ _mode | \
+ (1 << LPC_IOCONF_ADMODE)); \
} while (0)
+#define ao_enable_analog(port,bit) do { \
+ vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit)); \
+ ao_enable_port(port); \
+ lpc_gpio.dir[port] &= ~(1 << bit); \
+ *_ioconf = *_ioconf & ~((1 << LPC_IOCONF_ADMODE) | \
+ (LPC_IOCONF_MODE_MASK << LPC_IOCONF_MODE)); \
+ } while (0)
+
#define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
static inline uint32_t
/* Restore APSR */
asm("pop {r0}");
- asm("msr apsr,r0");
+ asm("msr apsr_nczvq,r0");
/* Restore general registers and return */
asm("pop {r0-r7,pc}\n");
ao_arch_release_interrupts(); \
} while (0)
+/*
+ * SPI
+ */
+
+#define ao_spi_set_cs(port,mask) (lpc_gpio.clr[port] = (mask))
+#define ao_spi_clr_cs(port,mask) (lpc_gpio.set[port] = (mask))
+
+#define ao_spi_get_mask(port,mask,bus,speed) do { \
+ ao_spi_get(bus, speed); \
+ ao_spi_set_cs(port, mask); \
+ } while (0)
+
+#define ao_spi_put_mask(reg,mask,bus) do { \
+ ao_spi_clr_cs(reg,mask); \
+ ao_spi_put(bus); \
+ } while (0)
+
+#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+
+void
+ao_spi_get(uint8_t spi_index, uint32_t speed);
+
+void
+ao_spi_put(uint8_t spi_index);
+
+void
+ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index);
+
+extern uint16_t ao_spi_speed[LPC_NUM_SPI];
+
+void
+ao_spi_init(void);
+
+#define ao_spi_init_cs(port, mask) do { \
+ uint8_t __bit__; \
+ for (__bit__ = 0; __bit__ < 32; __bit__++) { \
+ if (mask & (1 << __bit__)) \
+ ao_enable_output(port, __bit__, PIN, 1); \
+ } \
+ } while (0)
+
+#define HAS_ARCH_START_SCHEDULER 1
+
+static inline void ao_arch_start_scheduler(void) {
+ uint32_t sp;
+ uint32_t control;
+
+ asm("mrs %0,msp" : "=&r" (sp));
+ asm("msr psp,%0" : : "r" (sp));
+ asm("mrs %0,control" : "=&r" (control));
+ control |= (1 << 1);
+ asm("msr control,%0" : : "r" (control));
+}
+
#endif /* _AO_ARCH_FUNCS_H_ */