* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
+#ifdef HAVE_CONFIG_H
#include "config.h"
-#include "log.h"
-#include "jtag.h"
+#endif
+
+#include "interface.h"
#include "bitbang.h"
#define TDO_BIT 1
#define SRST_BIT 32
#define VCC_BIT 64
-/* system includes */
-#include <sys/io.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdio.h>
#include <sys/mman.h>
-#include <unistd.h>
-#include <fcntl.h>
-static u8 output_value = 0x0;
+static uint8_t output_value = 0x0;
static int dev_mem_fd;
static void *gpio_controller;
-static volatile u8 *gpio_data_register;
-static volatile u8 *gpio_data_direction_register;
+static volatile uint8_t *gpio_data_register;
+static volatile uint8_t *gpio_data_direction_register;
/* low level command set
*/
-int ep93xx_read(void);
-void ep93xx_write(int tck, int tms, int tdi);
-void ep93xx_reset(int trst, int srst);
+static int ep93xx_read(void);
+static void ep93xx_write(int tck, int tms, int tdi);
+static void ep93xx_reset(int trst, int srst);
-int ep93xx_speed(int speed);
-int ep93xx_register_commands(struct command_context_s *cmd_ctx);
-int ep93xx_init(void);
-int ep93xx_quit(void);
+static int ep93xx_speed(int speed);
+static int ep93xx_register_commands(struct command_context *cmd_ctx);
+static int ep93xx_init(void);
+static int ep93xx_quit(void);
struct timespec ep93xx_zzzz;
-jtag_interface_t ep93xx_interface =
+struct jtag_interface ep93xx_interface =
{
.name = "ep93xx",
-
- .execute_queue = bitbang_execute_queue,
- .support_statemove = 0,
+ .execute_queue = bitbang_execute_queue,
- .speed = ep93xx_speed,
+ .speed = ep93xx_speed,
.register_commands = ep93xx_register_commands,
.init = ep93xx_init,
.quit = ep93xx_quit,
};
-bitbang_interface_t ep93xx_bitbang =
+static struct bitbang_interface ep93xx_bitbang =
{
.read = ep93xx_read,
.write = ep93xx_write,
- .reset = ep93xx_reset
+ .reset = ep93xx_reset,
+ .blink = 0,
};
-int ep93xx_read(void)
+static int ep93xx_read(void)
{
return !!(*gpio_data_register & TDO_BIT);
}
-void ep93xx_write(int tck, int tms, int tdi)
+static void ep93xx_write(int tck, int tms, int tdi)
{
if (tck)
output_value |= TCK_BIT;
else
- output_value &= TCK_BIT;
-
+ output_value &= ~TCK_BIT;
+
if (tms)
output_value |= TMS_BIT;
else
- output_value &= TMS_BIT;
-
+ output_value &= ~TMS_BIT;
+
if (tdi)
output_value |= TDI_BIT;
else
- output_value &= TDI_BIT;
+ output_value &= ~TDI_BIT;
*gpio_data_register = output_value;
- nanosleep(ep93xx_zzzz);
+ nanosleep(&ep93xx_zzzz, NULL);
}
/* (1) assert or (0) deassert reset lines */
-void ep93xx_reset(int trst, int srst)
+static void ep93xx_reset(int trst, int srst)
{
if (trst == 0)
output_value |= TRST_BIT;
else if (trst == 1)
- output_value &= TRST_BIT;
+ output_value &= ~TRST_BIT;
if (srst == 0)
output_value |= SRST_BIT;
else if (srst == 1)
- output_value &= SRST_BIT;
-
+ output_value &= ~SRST_BIT;
+
*gpio_data_register = output_value;
- nanosleep(ep93xx_zzzz);
+ nanosleep(&ep93xx_zzzz, NULL);
}
-int ep93xx_speed(int speed)
+static int ep93xx_speed(int speed)
{
-
+
return ERROR_OK;
}
-int ep93xx_register_commands(struct command_context_s *cmd_ctx)
+static int ep93xx_register_commands(struct command_context *cmd_ctx)
{
return ERROR_OK;
static int set_gonk_mode(void)
{
void *syscon;
- u32 devicecfg;
+ uint32_t devicecfg;
syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
MAP_SHARED, dev_mem_fd, 0x80930000);
return ERROR_OK;
}
-int ep93xx_init(void)
+static int ep93xx_init(void)
{
int ret;
- bitbang_interface = &ep93xx_bitbang;
+ bitbang_interface = &ep93xx_bitbang;
ep93xx_zzzz.tv_sec = 0;
ep93xx_zzzz.tv_nsec = 10000000;
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
- printf("gpio_data_register = %08x\n", gpio_data_register);
- printf("gpio_data_direction_reg = %08x\n", gpio_data_direction_register);
+ LOG_INFO("gpio_data_register = %p\n", gpio_data_register);
+ LOG_INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
*/
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
*gpio_data_register = output_value;
- nanosleep(ep93xx_zzzz);
+ nanosleep(&ep93xx_zzzz, NULL);
/*
* Configure the direction register. 1 = output, 0 = input.
*gpio_data_direction_register =
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
- nanosleep(ep93xx_zzzz);
+ nanosleep(&ep93xx_zzzz, NULL);
return ERROR_OK;
}
-int ep93xx_quit(void)
+static int ep93xx_quit(void)
{
return ERROR_OK;