status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* clear readout protection and complementary option bytes
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 1 */
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 2 */
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 3 */
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 4 */
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write readout protection bit */
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
{
set = 1;
- if( protection & (1 << i))
+ if ( protection & (1 << i))
set = 0;
for (s = 0; s < stm32x_info->ppage_size; s++)
status = stm32x_wait_status_busy(bank, 10);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
- if( set )
+ if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
- if( set )
+ if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
status = stm32x_wait_status_busy(bank, 5);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
status = stm32x_wait_status_busy(bank, 5);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
- if( status & FLASH_WRPRTERR )
+ if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("stm32x device protected");
return ERROR_OK;
}
- if( status & FLASH_PGERR )
+ if ( status & FLASH_PGERR )
{
LOG_ERROR("stm32x device programming failed");
return ERROR_OK;