Nicolas Pitre nico at cam.org software ECC computation for NAND flash

[fw/openocd] / src / flash / s3c24xx_regs_nand.h

diff --git a/src/flash/s3c24xx_regs_nand.h b/src/flash/s3c24xx_regs_nand.h
index 7d295d80829b6b277a28d4e22089c17b06561760..31d9a856e80c186ccd49a1ee37ec1694ea176f41 100644 (file)
--- a/src/flash/s3c24xx_regs_nand.h
+++ b/src/flash/s3c24xx_regs_nand.h
@@ -85,11 +85,11 @@
 #define S3C2440_NFCONT_SPARE_ECCLOCK   (1<<6)
 #define S3C2440_NFCONT_MAIN_ECCLOCK    (1<<5)
 #define S3C2440_NFCONT_INITECC         (1<<4)
-#define S3C2440_NFCONT_nFCE            (1<<1)
+#define S3C2440_NFCONT_nFCE                    (1<<1)
 #define S3C2440_NFCONT_ENABLE          (1<<0)
 
 #define S3C2440_NFSTAT_READY           (1<<0)
-#define S3C2440_NFSTAT_nCE             (1<<1)
+#define S3C2440_NFSTAT_nCE                     (1<<1)
 #define S3C2440_NFSTAT_RnB_CHANGE      (1<<2)
 #define S3C2440_NFSTAT_ILLEGAL_ACCESS  (1<<3)
 
@@ -114,13 +114,13 @@
 #define S3C2412_NFSTAT_RnB_CHANGE      (1<<4)
 #define S3C2412_NFSTAT_nFCE1           (1<<3)
 #define S3C2412_NFSTAT_nFCE0           (1<<2)
-#define S3C2412_NFSTAT_Res1            (1<<1)
+#define S3C2412_NFSTAT_Res1                    (1<<1)
 #define S3C2412_NFSTAT_READY           (1<<0)
 
 #define S3C2412_NFECCERR_SERRDATA(x)   (((x) >> 21) & 0xf)
-#define S3C2412_NFECCERR_SERRBIT(x)    (((x) >> 18) & 0x7)
+#define S3C2412_NFECCERR_SERRBIT(x)            (((x) >> 18) & 0x7)
 #define S3C2412_NFECCERR_MERRDATA(x)   (((x) >> 7) & 0x3ff)
-#define S3C2412_NFECCERR_MERRBIT(x)    (((x) >> 4) & 0x7)
+#define S3C2412_NFECCERR_MERRBIT(x)            (((x) >> 4) & 0x7)
 #define S3C2412_NFECCERR_SPARE_ERR(x)  (((x) >> 2) & 0x3)
 #define S3C2412_NFECCERR_MAIN_ERR(x)   (((x) >> 2) & 0x3)
 #define S3C2412_NFECCERR_NONE          (0)