#include "config.h"
#endif
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include "nand.h"
#include "s3c24xx_nand.h"
-#include "target.h"
-int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2440_init(struct nand_device_s *device);
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
-nand_flash_controller_t s3c2440_nand_controller =
+NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
{
- .name = "s3c2440",
- .nand_device_command = s3c2440_nand_device_command,
- .register_commands = s3c24xx_register_commands,
- .init = s3c2440_init,
- .reset = s3c24xx_reset,
- .command = s3c24xx_command,
- .address = s3c24xx_address,
- .write_data = s3c24xx_write_data,
- .read_data = s3c24xx_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .write_block_data = s3c2440_write_block_data,
- .read_block_data = s3c2440_read_block_data,
- .controller_ready = s3c24xx_controller_ready,
- .nand_ready = s3c2440_nand_ready,
-};
-
-int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
- char **args, int argc,
- struct nand_device_s *device)
-{
- s3c24xx_nand_controller_t *info;
-
- info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
- if (info == NULL) {
- return ERROR_NAND_DEVICE_INVALID;
- }
+ struct s3c24xx_nand_controller *info;
+ CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
/* fill in the address fields for the core device */
info->cmd = S3C2440_NFCMD;
info->addr = S3C2440_NFADDR;
info->data = S3C2440_NFDATA;
info->nfstat = S3C2440_NFSTAT;
-
+
return ERROR_OK;
}
-int s3c2440_init(struct nand_device_s *device)
+static int s3c2440_init(struct nand_device *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+ struct target *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
return ERROR_OK;
}
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
+int s3c2440_nand_ready(struct nand_device *nand, int timeout)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
- target_t *target = s3c24xx_info->target;
- u8 status;
+ struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+ struct target *target = s3c24xx_info->target;
+ uint8_t status;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
-
- do {
+
+ do {
target_read_u8(target, s3c24xx_info->nfstat, &status);
-
+
if (status & S3C2440_NFSTAT_READY)
return 1;
/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
-int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_size)
+int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
- target_t *target = s3c24xx_info->target;
- u32 nfdata = s3c24xx_info->data;
- u32 tmp;
+ struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+ struct target *target = s3c24xx_info->target;
+ uint32_t nfdata = s3c24xx_info->data;
+ uint32_t tmp;
- LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
+ LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
- while (data_size >= 4) {
+ while (data_size >= 4) {
target_read_u32(target, nfdata, &tmp);
data[0] = tmp;
return ERROR_OK;
}
-int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_size)
+int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
- target_t *target = s3c24xx_info->target;
- u32 nfdata = s3c24xx_info->data;
- u32 tmp;
+ struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+ struct target *target = s3c24xx_info->target;
+ uint32_t nfdata = s3c24xx_info->data;
+ uint32_t tmp;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
- while (data_size >= 4) {
+ while (data_size >= 4) {
tmp = le_to_h_u32(data);
target_write_u32(target, nfdata, tmp);
return ERROR_OK;
}
+
+struct nand_flash_controller s3c2440_nand_controller = {
+ .name = "s3c2440",
+ .nand_device_command = &s3c2440_nand_device_command,
+ .register_commands = &s3c24xx_register_commands,
+ .init = &s3c2440_init,
+ .reset = &s3c24xx_reset,
+ .command = &s3c24xx_command,
+ .address = &s3c24xx_address,
+ .write_data = &s3c24xx_write_data,
+ .read_data = &s3c24xx_read_data,
+ .write_page = s3c24xx_write_page,
+ .read_page = s3c24xx_read_page,
+ .write_block_data = &s3c2440_write_block_data,
+ .read_block_data = &s3c2440_read_block_data,
+ .controller_ready = &s3c24xx_controller_ready,
+ .nand_ready = &s3c2440_nand_ready,
+ };
projects / fw / openocd / blobdiff