target_t -> struct target
[fw/openocd] / src / flash / s3c2412_nand.c
index 958f013d059842f2e74bcb5ca8c8ed7abcb53bbb..852193229238e65a2e7e1cb8e8d7939c4abce796 100644 (file)
@@ -32,7 +32,7 @@
 
 NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
 {
-       s3c24xx_nand_controller_t *info;
+       struct s3c24xx_nand_controller *info;
        CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
 
        /* fill in the address fields for the core device */
@@ -46,8 +46,8 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
 
 static int s3c2412_init(struct nand_device_s *nand)
 {
-       s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
-       target_t *target = s3c24xx_info->target;
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+       struct target *target = s3c24xx_info->target;
 
        target_write_u32(target, S3C2410_NFCONF,
                         S3C2440_NFCONF_TACLS(3) |
@@ -61,7 +61,7 @@ static int s3c2412_init(struct nand_device_s *nand)
        return ERROR_OK;
 }
 
-nand_flash_controller_t s3c2412_nand_controller = {
+struct nand_flash_controller s3c2412_nand_controller = {
                .name = "s3c2412",
                .nand_device_command = &s3c2412_nand_device_command,
                .register_commands = &s3c24xx_register_commands,