{ 0x00, NULL, 0 }
};
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr);
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word);
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr);
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word);
/* flash bank pic32mx <base> <size> 0 0 <target#>
*/
FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
{
- pic32mx_flash_bank_t *pic32mx_info;
+ struct pic32mx_flash_bank *pic32mx_info;
- if (argc < 6)
+ if (CMD_ARGC < 6)
{
LOG_WARNING("incomplete flash_bank pic32mx configuration");
return ERROR_FLASH_BANK_INVALID;
}
- pic32mx_info = malloc(sizeof(pic32mx_flash_bank_t));
+ pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
bank->driver_priv = pic32mx_info;
pic32mx_info->write_algorithm = NULL;
return ERROR_OK;
}
-static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
+static uint32_t pic32mx_get_flash_status(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_read_u32(target, PIC32MX_NVMCON, &status);
return status;
}
-static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
{
uint32_t status;
return status;
}
-static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t timeout)
+static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeout)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
return status;
}
-static int pic32mx_protect_check(struct flash_bank_s *bank)
+static int pic32mx_protect_check(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t devcfg0;
int s;
return ERROR_OK;
}
-static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t status;
return ERROR_OK;
}
-static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
{
- pic32mx_flash_bank_t *pic32mx_info = NULL;
- target_t *target = bank->target;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
+ struct target *target = bank->target;
#if 0
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
#endif
}
-static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 512;
- working_area_t *source;
+ struct working_area *source;
uint32_t address = bank->base + offset;
int retval = ERROR_OK;
#if 0
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
- armv7m_algorithm_t armv7m_info;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
+ struct armv7m_algorithm armv7m_info;
uint8_t pic32mx_flash_write_code[] = {
/* write: */
return retval;
}
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word)
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
/*
* Write a 128 word (512 byte) row to flash address from RAM srcaddr.
*/
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr)
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
}
-static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
uint32_t bytes_remaining = (count & 0x00000003);
return ERROR_OK;
}
-static int pic32mx_probe(struct flash_bank_s *bank)
+static int pic32mx_probe(struct flash_bank *bank)
{
- target_t *target = bank->target;
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct target *target = bank->target;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int i;
uint16_t num_pages = 0;
uint32_t device_id;
return ERROR_OK;
}
-static int pic32mx_auto_probe(struct flash_bank_s *bank)
+static int pic32mx_auto_probe(struct flash_bank *bank)
{
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
if (pic32mx_info->probed)
return ERROR_OK;
return pic32mx_probe(bank);
}
#endif
-static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct target *target = bank->target;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t device_id;
int printed = 0, i;
#if 0
COMMAND_HANDLER(pic32mx_handle_lock_command)
{
- target_t *target = NULL;
- pic32mx_flash_bank_t *pic32mx_info = NULL;
+ struct target *target = NULL;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
- command_print(cmd_ctx, "pic32mx lock <bank>");
+ command_print(CMD_CTX, "pic32mx lock <bank>");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
if (pic32mx_erase_options(bank) != ERROR_OK)
{
- command_print(cmd_ctx, "pic32mx failed to erase options");
+ command_print(CMD_CTX, "pic32mx failed to erase options");
return ERROR_OK;
}
if (pic32mx_write_options(bank) != ERROR_OK)
{
- command_print(cmd_ctx, "pic32mx failed to lock device");
+ command_print(CMD_CTX, "pic32mx failed to lock device");
return ERROR_OK;
}
- command_print(cmd_ctx, "pic32mx locked");
+ command_print(CMD_CTX, "pic32mx locked");
return ERROR_OK;
}
COMMAND_HANDLER(pic32mx_handle_unlock_command)
{
- target_t *target = NULL;
- pic32mx_flash_bank_t *pic32mx_info = NULL;
+ struct target *target = NULL;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
- command_print(cmd_ctx, "pic32mx unlock <bank>");
+ command_print(CMD_CTX, "pic32mx unlock <bank>");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
if (pic32mx_erase_options(bank) != ERROR_OK)
{
- command_print(cmd_ctx, "pic32mx failed to unlock device");
+ command_print(CMD_CTX, "pic32mx failed to unlock device");
return ERROR_OK;
}
if (pic32mx_write_options(bank) != ERROR_OK)
{
- command_print(cmd_ctx, "pic32mx failed to lock device");
+ command_print(CMD_CTX, "pic32mx failed to lock device");
return ERROR_OK;
}
- command_print(cmd_ctx, "pic32mx unlocked");
+ command_print(CMD_CTX, "pic32mx unlocked");
return ERROR_OK;
}
#endif
#if 0
-static int pic32mx_chip_erase(struct flash_bank_s *bank)
+static int pic32mx_chip_erase(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint32_t status;
#endif
#if 0
int i;
- if (argc != 0)
+ if (CMD_ARGC != 0)
{
- command_print(cmd_ctx, "pic32mx chip_erase");
+ command_print(CMD_CTX, "pic32mx chip_erase");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
bank->sectors[i].is_erased = 1;
}
- command_print(cmd_ctx, "pic32mx chip erase complete");
+ command_print(CMD_CTX, "pic32mx chip erase complete");
}
else
{
- command_print(cmd_ctx, "pic32mx chip erase failed");
+ command_print(CMD_CTX, "pic32mx chip erase failed");
}
#endif
uint32_t address, value;
int status, res;
- if (argc != 3)
+ if (CMD_ARGC != 3)
{
- command_print(
cmd_ctx, "pic32mx pgm_word <addr> <value> <bank>");
+ command_print(
CMD_CTX, "pic32mx pgm_word <addr> <value> <bank>");
return ERROR_OK;
}
- COMMAND_PARSE_NUMBER(u32, args[0], address);
- COMMAND_PARSE_NUMBER(u32, args[1], value);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[2], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank);
if (ERROR_OK != retval)
return retval;
if (address < bank->base || address >= (bank->base + bank->size))
{
- command_print(cmd_ctx, "flash address '%s' is out of bounds", args[0]);
+ command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
return ERROR_OK;
}
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)
- command_print(cmd_ctx, "pic32mx pgm word complete");
+ command_print(CMD_CTX, "pic32mx pgm word complete");
else
- command_print(cmd_ctx, "pic32mx pgm word failed (status = 0x%x)", status);
+ command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
return ERROR_OK;
}
-
-static int pic32mx_register_commands(struct command_context_s *cmd_ctx)
-{
- command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx",
- NULL, COMMAND_ANY, "pic32mx flash specific commands");
-#if 0
- register_command(cmd_ctx, pic32mx_cmd, "lock",
- pic32mx_handle_lock_command, COMMAND_EXEC,
- "lock device");
- register_command(cmd_ctx, pic32mx_cmd, "unlock",
- pic32mx_handle_unlock_command, COMMAND_EXEC,
- "unlock protected device");
-#endif
- register_command(cmd_ctx, pic32mx_cmd, "chip_erase",
- pic32mx_handle_chip_erase_command, COMMAND_EXEC,
- "erase device");
- register_command(cmd_ctx, pic32mx_cmd, "pgm_word",
- pic32mx_handle_pgm_word_command, COMMAND_EXEC,
- "program a word");
- return ERROR_OK;
-}
+static const struct command_registration pic32mx_exec_command_handlers[] = {
+ {
+ .name = "chip_erase",
+ .handler = &pic32mx_handle_chip_erase_command,
+ .mode = COMMAND_EXEC,
+ .help = "erase device",
+ },
+ {
+ .name = "pgm_word",
+ .handler = &pic32mx_handle_pgm_word_command,
+ .mode = COMMAND_EXEC,
+ .help = "program a word",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+static const struct command_registration pic32mx_command_handlers[] = {
+ {
+ .name = "pic32mx",
+ .mode = COMMAND_ANY,
+ .help = "pic32mx flash command group",
+ .chain = pic32mx_exec_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
struct flash_driver pic32mx_flash = {
.name = "pic32mx",
- .register_commands = &pic32mx_register_commands,
+ .commands = pic32mx_command_handlers,
.flash_bank_command = &pic32mx_flash_bank_command,
.erase = &pic32mx_erase,
.protect = &pic32mx_protect,
projects / fw / openocd / blobdiff