{
unsigned int nvpsiz;
- nvpsiz=(inr(DBGU_CIDR)>>8)&0xf;
+ nvpsiz=(inr(DBGU_CIDR) >> 8)&0xf;
switch (nvpsiz) {
case 3:
uint32 *data_ptr;
/* select proper controller */
- if (page_num>=1024) efc_ofs=0x10;
+ if (page_num >= 1024) efc_ofs=0x10;
else efc_ofs=0;
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* calculate page address, only lower 8 bits are used to address the latch,
but the upper part of address is needed for writing to proper EFC */
}
/* page number and page write command to FCR */
- outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | MC_KEY | MC_FCMD_WP);
+ outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | MC_KEY | MC_FCMD_WP);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
int page_num;
page_num=0;
- lockbits=inr(MC_FSR+efc_ofs)>>16;
+ lockbits=inr(MC_FSR+efc_ofs) >> 16;
while (lockbits) {
if (lockbits&1) {
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
- outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | 0x5a000004);
+ outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | 0x5a000004);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
}
- if ((page_num+=flash_lock_pages)>flash_page_count) break;
+ if ((page_num += flash_lock_pages)>flash_page_count) break;
lockbits>>=1;
}
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* erase all command to FCR */
outr(MC_FCR+efc_ofs, 0x5a000008);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
{
int result;
- if ((result=flash_erase_plane(0))!=FLASH_STAT_OK) return result;
+ if ((result=flash_erase_plane(0)) != FLASH_STAT_OK) return result;
/* the second flash controller, if any */
if (flash_page_count>1024) result=flash_erase_plane(0x10);