- Fixes '==' whitespace

[fw/openocd] / src / flash / ocl / at91sam7x / samflash.c

diff --git a/src/flash/ocl/at91sam7x/samflash.c b/src/flash/ocl/at91sam7x/samflash.c
index 66a857b39c332cc0d08f645ed77d8becf490d997..a534f6d8de1dc270efa879609a583cf1ea4cc5f5 100644 (file)
--- a/src/flash/ocl/at91sam7x/samflash.c
+++ b/src/flash/ocl/at91sam7x/samflash.c
@@ -32,7 +32,7 @@ int flash_init(void)
 {
        unsigned int nvpsiz;
 
-       nvpsiz=(inr(DBGU_CIDR)>>8)&0xf;
+       nvpsiz=(inr(DBGU_CIDR) >> 8)&0xf;
 
        switch (nvpsiz) {
                case 3:
@@ -86,7 +86,7 @@ int flash_page_program(uint32 *data, int page_num)
        else efc_ofs=0;
 
        /* wait until FLASH is ready, just for sure */
-       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
        /* calculate page address, only lower 8 bits are used to address the latch,
                 but the upper part of address is needed for writing to proper EFC */
@@ -100,10 +100,10 @@ int flash_page_program(uint32 *data, int page_num)
        }
 
        /* page number and page write command to FCR */
-       outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | MC_KEY | MC_FCMD_WP);
+       outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | MC_KEY | MC_FCMD_WP);
 
        /* wait until it's done */
-       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
        /* check for errors */
        if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
@@ -129,17 +129,17 @@ int flash_erase_plane(int efc_ofs)
        int page_num;
 
        page_num=0;
-       lockbits=inr(MC_FSR+efc_ofs)>>16;
+       lockbits=inr(MC_FSR+efc_ofs) >> 16;
        while (lockbits) {
                if (lockbits&1) {
 
                        /* wait until FLASH is ready, just for sure */
-                       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+                       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
-                       outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | 0x5a000004);
+                       outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | 0x5a000004);
 
                        /* wait until it's done */
-                       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+                       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
                        /* check for errors */
                        if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
@@ -151,13 +151,13 @@ int flash_erase_plane(int efc_ofs)
        }
 
        /* wait until FLASH is ready, just for sure */
-       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
        /* erase all command to FCR */
        outr(MC_FCR+efc_ofs, 0x5a000008);
 
        /* wait until it's done */
-       while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+       while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
 
        /* check for errors */
        if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;