static int stm32lx_unlock(struct flash_bank *bank);
static int stm32lx_mass_erase(struct flash_bank *bank);
static int stm32lx_wait_until_bsy_clear_timeout(struct flash_bank *bank, int timeout);
+static int stm32lx_update_part_info(struct flash_bank *bank, uint16_t flash_size_in_kb);
struct stm32lx_rev {
uint16_t rev;
};
struct stm32lx_flash_bank {
- int probed;
+ bool probed;
uint32_t idcode;
uint32_t user_bank_size;
uint32_t flash_base;
- const struct stm32lx_part_info *part_info;
+ struct stm32lx_part_info part_info;
};
static const struct stm32lx_rev stm32_416_revs[] = {
{ 0x1000, "A" }, { 0x2000, "B" }, { 0x2008, "Y" },
};
static const struct stm32lx_rev stm32_427_revs[] = {
- { 0x1000, "A" }, { 0x1018, "Y" }, { 0x1038, "X" },
+ { 0x1000, "A" }, { 0x1018, "Y" }, { 0x1038, "X" }, { 0x10f8, "V" },
};
static const struct stm32lx_rev stm32_429_revs[] = {
{ 0x1000, "A" }, { 0x1018, "Z" },
.page_size = 256,
.pages_per_sector = 16,
.max_flash_size_kb = 512,
- .first_bank_size_kb = 256,
+ .first_bank_size_kb = 0, /* determined in runtime */
.has_dual_banks = true,
.flash_base = 0x40023C00,
.fsize_base = 0x1FF800CC,
.page_size = 128,
.pages_per_sector = 32,
.max_flash_size_kb = 192,
- .first_bank_size_kb = 128,
- .has_dual_banks = true,
+ .first_bank_size_kb = 0, /* determined in runtime */
+ .has_dual_banks = false, /* determined in runtime */
.flash_base = 0x40022000,
.fsize_base = 0x1FF8007C,
},
bank->driver_priv = stm32lx_info;
- stm32lx_info->probed = 0;
+ stm32lx_info->probed = false;
stm32lx_info->user_bank_size = bank->size;
/* the stm32l erased value is 0x00 */
COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
{
- int i;
-
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
retval = stm32lx_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
+ for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
- command_print(CMD_CTX, "stm32lx mass erase complete");
+ command_print(CMD, "stm32lx mass erase complete");
} else {
- command_print(CMD_CTX, "stm32lx mass erase failed");
+ command_print(CMD, "stm32lx mass erase failed");
}
return retval;
retval = stm32lx_lock(bank);
if (retval == ERROR_OK)
- command_print(CMD_CTX, "STM32Lx locked, takes effect after power cycle.");
+ command_print(CMD, "STM32Lx locked, takes effect after power cycle.");
else
- command_print(CMD_CTX, "STM32Lx lock failed");
+ command_print(CMD, "STM32Lx lock failed");
return retval;
}
retval = stm32lx_unlock(bank);
if (retval == ERROR_OK)
- command_print(CMD_CTX, "STM32Lx unlocked, takes effect after power cycle.");
+ command_print(CMD, "STM32Lx unlocked, takes effect after power cycle.");
else
- command_print(CMD_CTX, "STM32Lx unlock failed");
+ command_print(CMD, "STM32Lx unlock failed");
return retval;
}
if (retval != ERROR_OK)
return retval;
- for (int i = 0; i < bank->num_sectors; i++) {
+ for (unsigned int i = 0; i < bank->num_sectors; i++) {
if (wrpr & (1 << i))
bank->sectors[i].is_protected = 1;
else
return ERROR_OK;
}
-static int stm32lx_erase(struct flash_bank *bank, int first, int last)
+static int stm32lx_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
int retval;
/*
* Loop over the selected sectors and erase them
*/
- for (int i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
retval = stm32lx_erase_sector(bank, i);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
-static int stm32lx_protect(struct flash_bank *bank, int set, int first,
- int last)
-{
- LOG_WARNING("protection of the STM32L flash is not implemented");
- return ERROR_OK;
-}
-
static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
+ uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
uint32_t buffer_size = 16384;
struct working_area *write_algorithm;
struct working_area *source;
int retval = ERROR_OK;
- /* see contib/loaders/flash/stm32lx.S for src */
-
static const uint8_t stm32lx_flash_write_code[] = {
- 0x92, 0x00, 0x8A, 0x18, 0x01, 0xE0, 0x08, 0xC9, 0x08, 0xC0, 0x91, 0x42, 0xFB, 0xD1, 0x00, 0xBE
+#include "../../../contrib/loaders/flash/stm32/stm32lx.inc"
};
/* Make sure we're performing a half-page aligned write. */
else
buffer_size /= 2;
- if (buffer_size <= stm32lx_info->part_info->page_size) {
+ if (buffer_size <= stm32lx_info->part_info.page_size) {
/* we already allocated the writing code, but failed to get a
* buffer, free the algorithm */
target_free_working_area(target, write_algorithm);
struct target *target = bank->target;
struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
+ uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
uint32_t halfpages_number;
uint32_t bytes_remaining = 0;
uint32_t address = bank->base + offset;
static int stm32lx_read_id_code(struct target *target, uint32_t *id)
{
- /* read stm32 device id register */
- int retval = target_read_u32(target, DBGMCU_IDCODE, id);
- if (retval != ERROR_OK)
- return retval;
-
- /* STM32L0 parts will have 0 there, try reading the L0's location for
- * DBG_IDCODE in case this is an L0 part. */
- if (*id == 0)
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ int retval;
+ if (armv7m->arm.is_armv6m == true)
retval = target_read_u32(target, DBGMCU_IDCODE_L0, id);
-
+ else
+ /* read stm32 device id register */
+ retval = target_read_u32(target, DBGMCU_IDCODE, id);
return retval;
}
{
struct target *target = bank->target;
struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int i;
uint16_t flash_size_in_kb;
uint32_t device_id;
uint32_t base_address = FLASH_BANK0_ADDRESS;
uint32_t second_bank_base;
+ unsigned int n;
- stm32lx_info->probed = 0;
- stm32lx_info->part_info = NULL;
+ stm32lx_info->probed = false;
int retval = stm32lx_read_id_code(bank->target, &device_id);
if (retval != ERROR_OK)
LOG_DEBUG("device id = 0x%08" PRIx32 "", device_id);
- for (unsigned int n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
- if ((device_id & 0xfff) == stm32lx_parts[n].id)
- stm32lx_info->part_info = &stm32lx_parts[n];
+ for (n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
+ if ((device_id & 0xfff) == stm32lx_parts[n].id) {
+ stm32lx_info->part_info = stm32lx_parts[n];
+ break;
+ }
}
- if (!stm32lx_info->part_info) {
- LOG_WARNING("Cannot identify target as a STM32L family.");
+ if (n == ARRAY_SIZE(stm32lx_parts)) {
+ LOG_ERROR("Cannot identify target as an STM32 L0 or L1 family device.");
return ERROR_FAIL;
} else {
- LOG_INFO("Device: %s", stm32lx_info->part_info->device_str);
+ LOG_INFO("Device: %s", stm32lx_info->part_info.device_str);
}
- stm32lx_info->flash_base = stm32lx_info->part_info->flash_base;
+ stm32lx_info->flash_base = stm32lx_info->part_info.flash_base;
/* Get the flash size from target. */
- retval = target_read_u16(target, stm32lx_info->part_info->fsize_base,
+ retval = target_read_u16(target, stm32lx_info->part_info.fsize_base,
&flash_size_in_kb);
/* 0x436 devices report their flash size as a 0 or 1 code indicating 384K
flash_size_in_kb = 256;
}
+ /* 0x429 devices only use the lowest 8 bits of the flash size register */
+ if (retval == ERROR_OK && (device_id & 0xfff) == 0x429) {
+ flash_size_in_kb &= 0xff;
+ }
+
/* Failed reading flash size or flash size invalid (early silicon),
* default to max target family */
if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
- stm32lx_info->part_info->max_flash_size_kb);
- flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
- } else if (flash_size_in_kb > stm32lx_info->part_info->max_flash_size_kb) {
+ stm32lx_info->part_info.max_flash_size_kb);
+ flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
+ } else if (flash_size_in_kb > stm32lx_info->part_info.max_flash_size_kb) {
LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
- flash_size_in_kb, stm32lx_info->part_info->max_flash_size_kb,
- stm32lx_info->part_info->max_flash_size_kb);
- flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
+ flash_size_in_kb, stm32lx_info->part_info.max_flash_size_kb,
+ stm32lx_info->part_info.max_flash_size_kb);
+ flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
}
- if (stm32lx_info->part_info->has_dual_banks) {
+ /* Overwrite default dual-bank configuration */
+ retval = stm32lx_update_part_info(bank, flash_size_in_kb);
+ if (retval != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (stm32lx_info->part_info.has_dual_banks) {
/* Use the configured base address to determine if this is the first or second flash bank.
* Verify that the base address is reasonably correct and determine the flash bank size
*/
second_bank_base = base_address +
- stm32lx_info->part_info->first_bank_size_kb * 1024;
+ stm32lx_info->part_info.first_bank_size_kb * 1024;
if (bank->base == second_bank_base || !bank->base) {
/* This is the second bank */
base_address = second_bank_base;
flash_size_in_kb = flash_size_in_kb -
- stm32lx_info->part_info->first_bank_size_kb;
+ stm32lx_info->part_info.first_bank_size_kb;
} else if (bank->base == base_address) {
/* This is the first bank */
- flash_size_in_kb = stm32lx_info->part_info->first_bank_size_kb;
+ flash_size_in_kb = stm32lx_info->part_info.first_bank_size_kb;
} else {
- LOG_WARNING("STM32L flash bank base address config is incorrect."
- " 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32,
+ LOG_WARNING("STM32L flash bank base address config is incorrect. "
+ TARGET_ADDR_FMT " but should rather be 0x%" PRIx32
+ " or 0x%" PRIx32,
bank->base, base_address, second_bank_base);
return ERROR_FAIL;
}
- LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%" PRIx32,
+ LOG_INFO("STM32L flash has dual banks. Bank (%u) size is %dkb, base address is 0x%" PRIx32,
bank->bank_number, flash_size_in_kb, base_address);
} else {
LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address);
}
/* calculate numbers of sectors (4kB per sector) */
- int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE;
+ unsigned int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE;
if (bank->sectors) {
free(bank->sectors);
return ERROR_FAIL;
}
- for (i = 0; i < num_sectors; i++) {
+ for (unsigned int i = 0; i < num_sectors; i++) {
bank->sectors[i].offset = i * FLASH_SECTOR_SIZE;
bank->sectors[i].size = FLASH_SECTOR_SIZE;
bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
+ bank->sectors[i].is_protected = -1;
}
- stm32lx_info->probed = 1;
+ stm32lx_info->probed = true;
return ERROR_OK;
}
static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
{
struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
+ const struct stm32lx_part_info *info = &stm32lx_info->part_info;
+ uint16_t rev_id = stm32lx_info->idcode >> 16;
+ const char *rev_str = NULL;
if (!stm32lx_info->probed) {
int retval = stm32lx_probe(bank);
}
}
- const struct stm32lx_part_info *info = stm32lx_info->part_info;
-
- if (info) {
- const char *rev_str = NULL;
- uint16_t rev_id = stm32lx_info->idcode >> 16;
-
- for (unsigned int i = 0; i < info->num_revs; i++)
- if (rev_id == info->revs[i].rev)
- rev_str = info->revs[i].str;
+ for (unsigned int i = 0; i < info->num_revs; i++)
+ if (rev_id == info->revs[i].rev)
+ rev_str = info->revs[i].str;
- if (rev_str != NULL) {
- snprintf(buf, buf_size,
- "%s - Rev: %s",
- stm32lx_info->part_info->device_str, rev_str);
- } else {
- snprintf(buf, buf_size,
- "%s - Rev: unknown (0x%04x)",
- stm32lx_info->part_info->device_str, rev_id);
- }
-
- return ERROR_OK;
+ if (rev_str != NULL) {
+ snprintf(buf, buf_size,
+ "%s - Rev: %s",
+ info->device_str, rev_str);
} else {
- snprintf(buf, buf_size, "Cannot identify target as a STM32Lx");
-
- return ERROR_FAIL;
+ snprintf(buf, buf_size,
+ "%s - Rev: unknown (0x%04x)",
+ info->device_str, rev_id);
}
+
+ return ERROR_OK;
}
static const struct command_registration stm32lx_exec_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-struct flash_driver stm32lx_flash = {
+const struct flash_driver stm32lx_flash = {
.name = "stm32lx",
.commands = stm32lx_command_handlers,
.flash_bank_command = stm32lx_flash_bank_command,
.erase = stm32lx_erase,
- .protect = stm32lx_protect,
.write = stm32lx_write,
.read = default_flash_read,
.probe = stm32lx_probe,
.erase_check = default_flash_blank_check,
.protect_check = stm32lx_protect_check,
.info = stm32lx_get_info,
+ .free_driver_priv = default_flash_free_driver_priv,
};
/* Static methods implementation */
if (retval != ERROR_OK)
return retval;
- for (int page = 0; page < (int)stm32lx_info->part_info->pages_per_sector;
+ for (int page = 0; page < (int)stm32lx_info->part_info.pages_per_sector;
page++) {
reg32 = FLASH_PECR__PROG | FLASH_PECR__ERASE;
retval = target_write_u32(target,
return retval;
uint32_t addr = bank->base + bank->sectors[sector].offset + (page
- * stm32lx_info->part_info->page_size);
+ * stm32lx_info->part_info.page_size);
retval = target_write_u32(target, addr, 0x0);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
+
+static int stm32lx_update_part_info(struct flash_bank *bank, uint16_t flash_size_in_kb)
+{
+ struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
+
+ switch (stm32lx_info->part_info.id) {
+ case 0x447: /* STM32L0xx (Cat.5) devices */
+ if (flash_size_in_kb == 192 || flash_size_in_kb == 128) {
+ stm32lx_info->part_info.first_bank_size_kb = flash_size_in_kb / 2;
+ stm32lx_info->part_info.has_dual_banks = true;
+ }
+ break;
+ case 0x437: /* STM32L1xx (Cat.5/Cat.6) */
+ stm32lx_info->part_info.first_bank_size_kb = flash_size_in_kb / 2;
+ break;
+ }
+
+ return ERROR_OK;
+}
projects / fw / openocd / blobdiff