flash/nor/stm32xx: fix segfault accessing Cortex-M part number
[fw/openocd] / src / flash / nor / stm32h7x.c
index e6a4efc199fd90ac6d8b922239d34dd0a2c8c00e..6d3149f9464dd1c9a813db3c19dc27d61d208e6b 100644 (file)
@@ -21,7 +21,7 @@
 #include "imp.h"
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
-#include <target/armv7m.h>
+#include <target/cortex_m.h>
 
 
 /* Erase time can be as high as 1000ms, 10x this and it's toast... */
@@ -766,6 +766,11 @@ static int stm32x_probe(struct flash_bank *bank)
        stm32x_info->probed = false;
        stm32x_info->part_info = NULL;
 
+       if (!target_was_examined(target)) {
+               LOG_ERROR("Target not examined yet");
+               return ERROR_TARGET_NOT_EXAMINED;
+       }
+
        int retval = stm32x_read_id_code(bank, &stm32x_info->idcode);
        if (retval != ERROR_OK)
                return retval;
@@ -797,15 +802,20 @@ static int stm32x_probe(struct flash_bank *bank)
        LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base);
 
        /* get flash size from target */
-       retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);
+       /* STM32H74x/H75x, the second core (Cortex-M4) cannot read the flash size */
+       retval = ERROR_FAIL;
+       if (device_id == DEVID_STM32H74_H75XX
+                       && cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO)
+               LOG_WARNING("%s cannot read the flash size register", target_name(target));
+       else
+               retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);
+
        if (retval != ERROR_OK) {
                /* read error when device has invalid value, set max flash size */
                flash_size_in_kb = stm32x_info->part_info->max_flash_size_kb;
+               LOG_INFO("assuming %" PRIu16 "k flash", flash_size_in_kb);
        } else
-               LOG_INFO("flash size probed value %" PRIu16, flash_size_in_kb);
-
-
-
+               LOG_INFO("flash size probed value %" PRIu16 "k", flash_size_in_kb);
 
        /* setup bank size */
        const uint32_t bank1_base = FLASH_BANK0_ADDRESS;
@@ -1146,7 +1156,7 @@ COMMAND_HANDLER(stm32x_handle_option_write_command)
        return stm32x_modify_option(bank, reg_offset, value, mask);
 }
 
-static const struct command_registration stm32x_exec_command_handlers[] = {
+static const struct command_registration stm32h7x_exec_command_handlers[] = {
        {
                .name = "lock",
                .handler = stm32x_handle_lock_command,
@@ -1185,20 +1195,20 @@ static const struct command_registration stm32x_exec_command_handlers[] = {
        COMMAND_REGISTRATION_DONE
 };
 
-static const struct command_registration stm32x_command_handlers[] = {
+static const struct command_registration stm32h7x_command_handlers[] = {
        {
                .name = "stm32h7x",
                .mode = COMMAND_ANY,
                .help = "stm32h7x flash command group",
                .usage = "",
-               .chain = stm32x_exec_command_handlers,
+               .chain = stm32h7x_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE
 };
 
 const struct flash_driver stm32h7x_flash = {
        .name = "stm32h7x",
-       .commands = stm32x_command_handlers,
+       .commands = stm32h7x_command_handlers,
        .flash_bank_command = stm32x_flash_bank_command,
        .erase = stm32x_erase,
        .protect = stm32x_protect,