struct stm32x_flash_bank {
struct stm32x_options option_bytes;
int ppage_size;
- int probed;
+ bool probed;
bool has_dual_banks;
/* used to access dual flash bank stm32xl */
stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
bank->driver_priv = stm32x_info;
- stm32x_info->probed = 0;
+ stm32x_info->probed = false;
stm32x_info->has_dual_banks = false;
stm32x_info->can_load_options = false;
stm32x_info->register_base = FLASH_REG_BASE_B0;
/* if we have a dual flash bank device then
* we need to perform option byte stuff on bank0 only */
if (stm32x_info->register_base != FLASH_REG_BASE_B0) {
- LOG_ERROR("Option Byte Operation's must use bank0");
+ LOG_ERROR("Option byte operations must use bank 0");
return ERROR_FLASH_OPERATION_FAILED;
}
uint32_t option_bytes;
int retval;
- /* read user and read protection option bytes */
- retval = target_read_u32(target, STM32_OB_RDP, &option_bytes);
+ /* read user and read protection option bytes, user data option bytes */
+ retval = target_read_u32(target, STM32_FLASH_OBR_B0, &option_bytes);
if (retval != ERROR_OK)
return retval;
- stm32x_info->option_bytes.rdp = option_bytes & 0xFF;
- stm32x_info->option_bytes.user = (option_bytes >> 16) & 0xFF;
-
- /* read user data option bytes */
- retval = target_read_u32(target, STM32_OB_DATA0, &option_bytes);
- if (retval != ERROR_OK)
- return retval;
-
- stm32x_info->option_bytes.data = ((option_bytes >> 8) & 0xFF00) | (option_bytes & 0xFF);
+ stm32x_info->option_bytes.rdp = (option_bytes & (1 << OPT_READOUT)) ? 0 : stm32x_info->default_rdp;
+ stm32x_info->option_bytes.user = (option_bytes >> stm32x_info->option_offset >> 2) & 0xff;
+ stm32x_info->option_bytes.data = (option_bytes >> stm32x_info->user_data_offset) & 0xffff;
/* read write protection option bytes */
- retval = target_read_u32(target, STM32_OB_WRP0, &option_bytes);
- if (retval != ERROR_OK)
- return retval;
-
- stm32x_info->option_bytes.protection = ((option_bytes >> 8) & 0xFF00) | (option_bytes & 0xFF);
-
- retval = target_read_u32(target, STM32_OB_WRP2, &option_bytes);
+ retval = target_read_u32(target, STM32_FLASH_WRPR_B0, &stm32x_info->option_bytes.protection);
if (retval != ERROR_OK)
return retval;
- stm32x_info->option_bytes.protection |= (((option_bytes >> 8) & 0xFF00) | (option_bytes & 0xFF)) << 16;
-
return ERROR_OK;
}
if (retval != ERROR_OK)
return retval;
- for (int i = 0; i < bank->num_prot_blocks; i++)
+ for (unsigned int i = 0; i < bank->num_prot_blocks; i++)
bank->prot_blocks[i].is_protected = (protection & (1 << i)) ? 0 : 1;
return ERROR_OK;
}
-static int stm32x_erase(struct flash_bank *bank, int first, int last)
+static int stm32x_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
- int i;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
if (retval != ERROR_OK)
return retval;
- for (i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
-static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
+static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
return retval;
}
- for (int i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
if (set)
stm32x_info->option_bytes.protection &= ~(1 << i);
else
retval = retval2;
cleanup:
- if (new_buffer)
- free(new_buffer);
-
+ free(new_buffer);
return retval;
}
int page_size;
uint32_t base_address = 0x08000000;
- stm32x_info->probed = 0;
+ stm32x_info->probed = false;
stm32x_info->register_base = FLASH_REG_BASE_B0;
stm32x_info->user_data_offset = 10;
stm32x_info->option_offset = 0;
/* set page size, protection granularity and max flash size depending on family */
switch (device_id & 0xfff) {
- case 0x410: /* medium density */
+ case 0x440: /* stm32f05x */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 64;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0xAA;
+ stm32x_info->can_load_options = true;
+ break;
+ case 0x444: /* stm32f03x */
+ case 0x445: /* stm32f04x */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 32;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0xAA;
+ stm32x_info->can_load_options = true;
+ break;
+ case 0x448: /* stm32f07x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 128;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0xAA;
+ stm32x_info->can_load_options = true;
+ break;
+ case 0x442: /* stm32f09x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 256;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0xAA;
+ stm32x_info->can_load_options = true;
+ break;
+ case 0x410: /* stm32f1x medium-density */
page_size = 1024;
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 128;
break;
- case 0x412: /* low density */
+ case 0x412: /* stm32f1x low-density */
page_size = 1024;
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 32;
break;
- case 0x414: /* high density */
+ case 0x414: /* stm32f1x high-density */
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 512;
break;
- case 0x418: /* connectivity line density */
+ case 0x418: /* stm32f1x connectivity */
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 256;
break;
- case 0x420: /* value line density */
+ case 0x430: /* stm32f1 XL-density (dual flash banks) */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 1024;
+ stm32x_info->has_dual_banks = true;
+ break;
+ case 0x420: /* stm32f100xx low- and medium-density value line */
page_size = 1024;
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 128;
break;
+ case 0x428: /* stm32f100xx high-density value line */
+ page_size = 2048;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 512;
+ break;
case 0x422: /* stm32f302/3xb/c */
page_size = 2048;
stm32x_info->ppage_size = 2;
stm32x_info->default_rdp = 0xAA;
stm32x_info->can_load_options = true;
break;
- case 0x428: /* value line High density */
- page_size = 2048;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 128;
- break;
- case 0x430: /* xl line density (dual flash banks) */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 1024;
- stm32x_info->has_dual_banks = true;
- break;
case 0x432: /* stm32f37x */
page_size = 2048;
stm32x_info->ppage_size = 2;
stm32x_info->default_rdp = 0xAA;
stm32x_info->can_load_options = true;
break;
- case 0x440: /* stm32f05x */
- case 0x444: /* stm32f03x */
- case 0x445: /* stm32f04x */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 64;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0xAA;
- stm32x_info->can_load_options = true;
- break;
- case 0x448: /* stm32f07x */
- case 0x442: /* stm32f09x */
- page_size = 2048;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 256;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0xAA;
- stm32x_info->can_load_options = true;
- break;
default:
LOG_WARNING("Cannot identify target as a STM32 family.");
return ERROR_FAIL;
/* check that calculation result makes sense */
assert(num_pages > 0);
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
+ free(bank->sectors);
+ bank->sectors = NULL;
- if (bank->prot_blocks) {
- free(bank->prot_blocks);
- bank->prot_blocks = NULL;
- }
+ free(bank->prot_blocks);
+ bank->prot_blocks = NULL;
bank->base = base_address;
bank->size = (num_pages * page_size);
if (num_prot_blocks == 32)
bank->prot_blocks[31].size = (num_pages - (31 * stm32x_info->ppage_size)) * page_size;
- stm32x_info->probed = 1;
+ stm32x_info->probed = true;
return ERROR_OK;
}
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to erase options");
+ command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
stm32x_info->option_bytes.rdp = 0;
if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to lock device");
+ command_print(CMD, "stm32x failed to lock device");
return ERROR_OK;
}
- command_print(CMD_CTX, "stm32x locked");
+ command_print(CMD, "stm32x locked");
return ERROR_OK;
}
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to erase options");
+ command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to unlock device");
+ command_print(CMD, "stm32x failed to unlock device");
return ERROR_OK;
}
- command_print(CMD_CTX, "stm32x unlocked.\n"
+ command_print(CMD, "stm32x unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
return retval;
if (optionbyte & (1 << OPT_ERROR))
- command_print(CMD_CTX, "option byte complement error");
+ command_print(CMD, "option byte complement error");
- command_print(CMD_CTX, "option byte register = 0x%" PRIx32 "", optionbyte);
- command_print(CMD_CTX, "write protection register = 0x%" PRIx32 "", protection);
+ command_print(CMD, "option byte register = 0x%" PRIx32 "", optionbyte);
+ command_print(CMD, "write protection register = 0x%" PRIx32 "", protection);
- command_print(CMD_CTX, "read protection: %s",
+ command_print(CMD, "read protection: %s",
(optionbyte & (1 << OPT_READOUT)) ? "on" : "off");
/* user option bytes are offset depending on variant */
optionbyte >>= stm32x_info->option_offset;
- command_print(CMD_CTX, "watchdog: %sware",
+ command_print(CMD, "watchdog: %sware",
(optionbyte & (1 << OPT_RDWDGSW)) ? "soft" : "hard");
- command_print(CMD_CTX, "stop mode: %sreset generated upon entry",
+ command_print(CMD, "stop mode: %sreset generated upon entry",
(optionbyte & (1 << OPT_RDRSTSTOP)) ? "no " : "");
- command_print(CMD_CTX, "standby mode: %sreset generated upon entry",
+ command_print(CMD, "standby mode: %sreset generated upon entry",
(optionbyte & (1 << OPT_RDRSTSTDBY)) ? "no " : "");
if (stm32x_info->has_dual_banks)
- command_print(CMD_CTX, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
+ command_print(CMD, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
- command_print(CMD_CTX, "user data = 0x%02" PRIx16 "", user_data);
+ command_print(CMD, "user data = 0x%02" PRIx16 "", user_data);
return ERROR_OK;
}
{
struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
- uint16_t optionbyte;
+ uint8_t optionbyte;
+ uint16_t useropt;
if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
/* start with current options */
optionbyte = stm32x_info->option_bytes.user;
+ useropt = stm32x_info->option_bytes.data;
/* skip over flash bank */
CMD_ARGC--;
optionbyte |= (1 << 2);
else if (strcmp("RSTSTNDBY", CMD_ARGV[0]) == 0)
optionbyte &= ~(1 << 2);
- else if (stm32x_info->has_dual_banks) {
+ else if (strcmp("USEROPT", CMD_ARGV[0]) == 0) {
+ if (CMD_ARGC < 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], useropt);
+ CMD_ARGC--;
+ CMD_ARGV++;
+ } else if (stm32x_info->has_dual_banks) {
if (strcmp("BOOT0", CMD_ARGV[0]) == 0)
optionbyte |= (1 << 3);
else if (strcmp("BOOT1", CMD_ARGV[0]) == 0)
}
if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to erase options");
+ command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
stm32x_info->option_bytes.user = optionbyte;
+ stm32x_info->option_bytes.data = useropt;
if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to write options");
+ command_print(CMD, "stm32x failed to write options");
return ERROR_OK;
}
- command_print(CMD_CTX, "stm32x write options complete.\n"
+ command_print(CMD, "stm32x write options complete.\n"
"INFO: %spower cycle is required "
"for the new settings to take effect.",
stm32x_info->can_load_options
COMMAND_HANDLER(stm32x_handle_mass_erase_command)
{
- int i;
-
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
retval = stm32x_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
+ for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
- command_print(CMD_CTX, "stm32x mass erase complete");
+ command_print(CMD, "stm32x mass erase complete");
} else
- command_print(CMD_CTX, "stm32x mass erase failed");
+ command_print(CMD, "stm32x mass erase failed");
return retval;
}
.mode = COMMAND_EXEC,
.usage = "bank_id ('SWWDG'|'HWWDG') "
"('RSTSTNDBY'|'NORSTSTNDBY') "
- "('RSTSTOP'|'NORSTSTOP')",
+ "('RSTSTOP'|'NORSTSTOP') ('USEROPT' user_data)",
.help = "Replace bits in device option bytes.",
},
{
COMMAND_REGISTRATION_DONE
};
-struct flash_driver stm32f1x_flash = {
+const struct flash_driver stm32f1x_flash = {
.name = "stm32f1x",
.commands = stm32x_command_handlers,
.flash_bank_command = stm32x_flash_bank_command,