* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/***************************************************************************
#include "jtag/interface.h"
#include "imp.h"
#include <target/algorithm.h>
+#include <target/arm_adi_v5.h>
#include <target/armv7m.h>
#define DID0_VER(did0) ((did0 >> 28)&0x07)
uint8_t class;
uint8_t partno;
const char *partname;
-} StellarisParts[] = {
+} stellaris_parts[] = {
{0x00, 0x01, "LM3S101"},
{0x00, 0x02, "LM3S102"},
{0x01, 0xBF, "LM3S1110"},
{0xFF, 0x00, "Unknown Part"}
};
-static const char * const StellarisClassname[] = {
+static const char * const stellaris_classname[] = {
"Sandstorm",
"Fury",
"Unknown",
return ERROR_OK;
}
-static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stellaris_info(struct flash_bank *bank, struct command_invocation *cmd)
{
- int printed;
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
if (stellaris_info->did1 == 0)
return ERROR_FLASH_BANK_NOT_PROBED;
- /* Read main and master clock freqency register */
+ /* Read main and master clock frequency register */
stellaris_read_clock_info(bank);
- printed = snprintf(buf,
- buf_size,
- "\nTI/LMI Stellaris information: Chip is "
- "class %i (%s) %s rev %c%i\n",
- stellaris_info->target_class,
- StellarisClassname[stellaris_info->target_class],
- stellaris_info->target_name,
- (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
- (int)((stellaris_info->did0) & 0xFF));
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
- ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
- stellaris_info->did1,
- stellaris_info->did1,
- "ARMv7M",
- stellaris_info->sramsiz,
- (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
- buf += printed;
- buf_size -= printed;
-
- snprintf(buf,
- buf_size,
- "master clock: %ikHz%s, "
- "rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 ", "
- "pagesize: %" PRIu32 ", pages: %" PRIu32,
- (int)(stellaris_info->mck_freq / 1000),
- stellaris_info->mck_desc,
- stellaris_info->rcc,
- stellaris_info->rcc2,
- stellaris_info->pagesize,
- stellaris_info->num_pages);
+ command_print_sameline(cmd,
+ "\nTI/LMI Stellaris information: Chip is "
+ "class %i (%s) %s rev %c%i\n",
+ stellaris_info->target_class,
+ stellaris_classname[stellaris_info->target_class],
+ stellaris_info->target_name,
+ (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
+ (int)((stellaris_info->did0) & 0xFF));
+
+ command_print_sameline(cmd,
+ "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
+ ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
+ stellaris_info->did1,
+ stellaris_info->did1,
+ "ARMv7M",
+ stellaris_info->sramsiz,
+ (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
+
+ command_print_sameline(cmd,
+ "master clock: %ikHz%s, "
+ "rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 ", "
+ "pagesize: %" PRIu32 ", pages: %" PRIu32,
+ (int)(stellaris_info->mck_freq / 1000),
+ stellaris_info->mck_desc,
+ stellaris_info->rcc,
+ stellaris_info->rcc2,
+ stellaris_info->pagesize,
+ stellaris_info->num_pages);
return ERROR_OK;
}
* chip identification and status *
***************************************************************************/
-/* Set the flash timimg register to match current clocking */
+/* Set the flash timing register to match current clocking */
static void stellaris_set_flash_timing(struct flash_bank *bank)
{
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
LOG_WARNING("Unknown did0 class");
}
- for (i = 0; StellarisParts[i].partno; i++) {
- if ((StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) &&
- (StellarisParts[i].class == stellaris_info->target_class))
+ for (i = 0; stellaris_parts[i].partno; i++) {
+ if ((stellaris_parts[i].partno == ((did1 >> 16) & 0xFF)) &&
+ (stellaris_parts[i].class == stellaris_info->target_class))
break;
}
- stellaris_info->target_name = StellarisParts[i].partname;
+ stellaris_info->target_name = stellaris_parts[i].partname;
stellaris_info->did0 = did0;
stellaris_info->did1 = did1;
stellaris->num_pages;
uint32_t fmppe_addr;
int status = ERROR_OK;
- unsigned i;
if (stellaris->did1 == 0)
return ERROR_FLASH_BANK_NOT_PROBED;
- for (i = 0; i < (unsigned) bank->num_sectors; i++)
+ for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_protected = -1;
/* Read each Flash Memory Protection Program Enable (FMPPE) register
uint32_t fmppe;
target_read_u32(target, fmppe_addr, &fmppe);
- for (i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) {
+ for (unsigned int i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) {
bool protect = !(fmppe & (1 << i));
if (bits_per_page) {
bank->sectors[page++].is_protected = protect;
return status;
}
-static int stellaris_erase(struct flash_bank *bank, int first, int last)
+static int stellaris_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
- int banknr;
uint32_t flash_fmc, flash_cris;
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
struct target *target = bank->target;
if (stellaris_info->did1 == 0)
return ERROR_FLASH_BANK_NOT_PROBED;
- if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages))
+ if ((last < first) || (last >= stellaris_info->num_pages))
return ERROR_FLASH_SECTOR_INVALID;
- if ((first == 0) && (last == ((int)stellaris_info->num_pages-1)))
+ if ((first == 0) && (last == (stellaris_info->num_pages - 1)))
return stellaris_mass_erase(bank);
/* Refresh flash controller timing */
* it might want to process those IRQs.
*/
- for (banknr = first; banknr <= last; banknr++) {
+ for (unsigned int banknr = first; banknr <= last; banknr++) {
/* Address is first word in page */
target_write_u32(target, FLASH_FMA, banknr * stellaris_info->pagesize);
/* Write erase command */
target_read_u32(target, FLASH_FMC, &flash_fmc);
} while (flash_fmc & FMC_ERASE);
- /* Check acess violations */
+ /* Check access violations */
target_read_u32(target, FLASH_CRIS, &flash_cris);
if (flash_cris & (AMASK)) {
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "",
target_write_u32(target, FLASH_CRIS, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
-
- bank->sectors[banknr].is_erased = 1;
}
return ERROR_OK;
}
-static int stellaris_protect(struct flash_bank *bank, int set, int first, int last)
+static int stellaris_protect(struct flash_bank *bank, int set,
+ unsigned int first, unsigned int last)
{
struct stellaris_flash_bank *stellaris = bank->driver_priv;
struct target *target = bank->target;
else
fmppe_addr = SCB_BASE | FMPPE;
- int page = 0;
+ unsigned int page = 0;
unsigned int lockbitnum, lockbitcnt = flash_sizek / 2;
/* Every lock bit always corresponds to a 2k region */
for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) {
return ERROR_OK;
}
-/* see contib/loaders/flash/stellaris.s for src */
+/* see contrib/loaders/flash/stellaris.s for src */
static const uint8_t stellaris_write_code[] = {
/* write: */
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
LOG_DEBUG("writing flash word-at-a-time");
} else if (retval == ERROR_FLASH_OPERATION_FAILED) {
- /* if an error occured, we examine the reason, and quit */
+ /* if an error occurred, we examine the reason, and quit */
target_read_u32(target, FLASH_CRIS, &flash_cris);
LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris);
if (retval != ERROR_OK)
return retval;
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
+ free(bank->sectors);
/* provide this for the benefit of the NOR flash framework */
bank->size = stellaris_info->num_pages * stellaris_info->pagesize;
bank->num_sectors = stellaris_info->num_pages;
bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector));
- for (int i = 0; i < bank->num_sectors; i++) {
+ for (unsigned int i = 0; i < bank->num_sectors; i++) {
bank->sectors[i].offset = i * stellaris_info->pagesize;
bank->sectors[i].size = stellaris_info->pagesize;
bank->sectors[i].is_erased = -1;
COMMAND_HANDLER(stellaris_handle_mass_erase_command)
{
- int i;
-
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
- if (stellaris_mass_erase(bank) == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stellaris mass erase complete");
- } else
- command_print(CMD_CTX, "stellaris mass erase failed");
+ if (stellaris_mass_erase(bank) == ERROR_OK)
+ command_print(CMD, "stellaris mass erase complete");
+ else
+ command_print(CMD, "stellaris mass erase failed");
return ERROR_OK;
}
COMMAND_HANDLER(stellaris_handle_recover_command)
{
struct flash_bank *bank;
+ struct arm *arm;
int retval;
if (CMD_ARGC != 0)
}
adapter_assert_reset();
+ arm = target_to_arm(bank->target);
for (int i = 0; i < 5; i++) {
- retval = dap_to_swd(bank->target);
+ retval = dap_to_swd(arm->dap);
if (retval != ERROR_OK)
goto done;
- retval = dap_to_jtag(bank->target);
+ retval = dap_to_jtag(arm->dap);
if (retval != ERROR_OK)
goto done;
}
COMMAND_REGISTRATION_DONE
};
-struct flash_driver stellaris_flash = {
+const struct flash_driver stellaris_flash = {
.name = "stellaris",
.commands = stellaris_command_handlers,
.flash_bank_command = stellaris_flash_bank_command,
.erase_check = default_flash_blank_check,
.protect_check = stellaris_protect_check,
.info = get_stellaris_info,
+ .free_driver_priv = default_flash_free_driver_priv,
};
projects / fw / openocd / blobdiff