/* Private bank information for NuMicro. */
struct numicro_flash_bank {
struct working_area *write_algorithm;
- int probed;
+ bool probed;
const struct numicro_cpu_type *cpu;
};
return ERROR_OK;
}
-static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t addr, uint32_t wdata, uint32_t* rdata)
+static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t addr, uint32_t wdata, uint32_t *rdata)
{
uint32_t timeout, status;
int retval = ERROR_OK;
retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
+ LOG_DEBUG("status: 0x%" PRIx32 "", status);
if ((status & (ISPTRG_ISPGO)) == 0)
break;
if (timeout-- <= 0) {
{
struct target *target = bank->target;
uint32_t set, config[2];
- int i, retval = ERROR_OK;
+ int retval = ERROR_OK;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
set = 0;
}
- for (i = 0; i < bank->num_sectors; i++)
+ for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_protected = set;
return ERROR_OK;
}
-static int numicro_erase(struct flash_bank *bank, int first, int last)
+static int numicro_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
uint32_t timeout, status;
- int i, retval = ERROR_OK;
+ int retval = ERROR_OK;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
- LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%d to %d)", first, last);
+ LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%u to %u)", first, last);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
if (retval != ERROR_OK)
return retval;
- for (i = first; i <= last; i++) {
- LOG_DEBUG("erasing sector %d at address 0x%" PRIx32 "", i, bank->base + bank->sectors[i].offset);
+ for (unsigned int i = first; i <= last; i++) {
+ LOG_DEBUG("erasing sector %u at address " TARGET_ADDR_FMT, i,
+ bank->base + bank->sectors[i].offset);
retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + bank->sectors[i].offset);
if (retval != ERROR_OK)
return retval;
retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
+ LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
{
struct target *target = bank->target;
uint32_t timeout, status;
- uint8_t *new_buffer = NULL;
int retval = ERROR_OK;
if (target->state != TARGET_HALTED) {
if (retval != ERROR_OK)
return retval;
- if (count & 0x3) {
- uint32_t old_count = count;
- count = (old_count | 3) + 1;
- new_buffer = malloc(count);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write (%d), extending to %d "
- "and padding with 0xff", old_count, count);
- memset(new_buffer, 0xff, count);
- buffer = memcpy(new_buffer, buffer, old_count);
- }
+ assert(offset % 4 == 0);
+ assert(count % 4 == 0);
uint32_t words_remaining = count / 4;
/* program command */
for (uint32_t i = 0; i < count; i += 4) {
- LOG_DEBUG("write longword @ %08X", offset + i);
-
- uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
- memcpy(padding, buffer + i, MIN(4, count-i));
+ LOG_DEBUG("write longword @ %08" PRIX32, offset + i);
retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + offset + i);
if (retval != ERROR_OK)
return retval;
- retval = target_write_memory(target, NUMICRO_FLASH_ISPDAT, 4, 1, padding);
+ retval = target_write_memory(target, NUMICRO_FLASH_ISPDAT, 4, 1, buffer + i);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO);
retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
+ LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
return ERROR_OK;
}
-static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_type** cpu)
+static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_type **cpu)
{
uint32_t part_id;
int retval = ERROR_OK;
LOG_INFO("Device ID: 0x%08" PRIx32 "", part_id);
/* search part numbers */
- for (size_t i = 0; i < sizeof(NuMicroParts)/sizeof(NuMicroParts[0]); i++) {
+ for (size_t i = 0; i < ARRAY_SIZE(NuMicroParts); i++) {
if (part_id == NuMicroParts[i].partid) {
*cpu = &NuMicroParts[i];
LOG_INFO("Device Name: %s", (*cpu)->partname);
for (size_t i = 0; i < cpu->n_banks; i++) {
if (bank->base == cpu->bank[i].base) {
*flash_size = cpu->bank[i].size;
- LOG_INFO("bank base = 0x%08" PRIx32 ", size = 0x%08" PRIx32 "", bank->base, *flash_size);
+ LOG_INFO("bank base = " TARGET_ADDR_FMT ", size = 0x%08"
+ PRIx32, bank->base, *flash_size);
return ERROR_OK;
}
}
memset(bank_info, 0, sizeof(struct numicro_flash_bank));
bank->driver_priv = bank_info;
+ bank->write_start_alignment = bank->write_end_alignment = 4;
return ERROR_OK;
retval = numicro_fmc_cmd(target, ISPCMD_CHIPERASE, 0, 0, &rdat);
if (retval != ERROR_OK) {
- command_print(CMD_CTX, "numicro chip_erase failed");
+ command_print(CMD, "numicro chip_erase failed");
return retval;
}
- command_print(CMD_CTX, "numicro chip_erase complete");
+ command_print(CMD, "numicro chip_erase complete");
return ERROR_OK;
}
.handler = numicro_handle_chip_erase_command,
.mode = COMMAND_EXEC,
.help = "chip erase through ISP.",
+ .usage = "",
},
COMMAND_REGISTRATION_DONE
};
COMMAND_REGISTRATION_DONE
};
-struct flash_driver numicro_flash = {
+const struct flash_driver numicro_flash = {
.name = "numicro",
.commands = numicro_command_handlers,
.flash_bank_command = numicro_flash_bank_command,