+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Bogdan Kolbov *
* kolbov@niiet.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#define FCIS_OP_ERROR (1<<1) /* Flag operation error */
/*---- FCIC: CLear status register */
-#define FCIC_CLR_OPCMLT (1<<0) /* Cleare completion flag in register FCIS */
-#define FCIC_CLR_OPERROR (1<<1) /* Cleare error flag in register FCIS */
+#define FCIC_CLR_OPCMLT (1<<0) /* Clear completion flag in register FCIS */
+#define FCIC_CLR_OPERROR (1<<1) /* Clear error flag in register FCIS */
/*-- USERFLASH ---------------------------------------------------------------*/
#define USERFLASH_PAGE_SIZE 256
#define UFCIS_OP_ERROR (1<<1) /* Flag operation error */
/*---- UFCIC: CLear status register */
-#define UFCIC_CLR_OPCMLT (1<<0) /* Cleared completion flag in register FCIS */
-#define UFCIC_CLR_OPERROR (1<<1) /* Cleared error flag in register FCIS */
+#define UFCIC_CLR_OPCMLT (1<<0) /* Clear completion flag in register FCIS */
+#define UFCIC_CLR_OPERROR (1<<1) /* Clear error flag in register FCIS */
/*---- In info userflash address space */
#define INFOWORD0_ADDR 0x00
else
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr);
retval = target_write_u32(target, UFMA, uflash_addr);
if (retval != ERROR_OK)
if (retval != ERROR_OK)
return retval;
command_print(CMD, "Read userflash %s region:\n"
- "address = 0x%04x,\n"
- "value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
+ "address = 0x%04" PRIx32 ",\n"
+ "value = 0x%02" PRIx32 ".", CMD_ARGV[0], uflash_addr, uflash_data);
return retval;
}
else
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], uflash_data);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], uflash_data);
int page_num = uflash_addr/USERFLASH_PAGE_SIZE;
command_print(CMD, "Write userflash %s region:\n"
- "address = 0x%04x,\n"
- "value = 0x%02x.\n"
+ "address = 0x%04" PRIx32 ",\n"
+ "value = 0x%02" PRIx32 ".\n"
"Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
/* dump */
uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
return ERROR_COMMAND_SYNTAX_ERROR;
uint32_t pin;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], pin);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], pin);
if (pin > 15)
return ERROR_COMMAND_SYNTAX_ERROR;
retval = niietcm4_opstatus_check(bank);
if (retval != ERROR_OK)
return retval;
-
- bank->sectors[i].is_erased = 1;
}
return retval;
return ERROR_TARGET_NOT_HALTED;
}
- LOG_INFO("Plese wait ..."); /* it`s quite a long process */
+ LOG_INFO("Please wait ..."); /* it`s quite a long process */
/* chose between main bootflash and info bootflash */
if (niietcm4_info->bflash_info_remap) {
/* dump */
int rem = count % 16;
if (rem) {
new_buffer = malloc(count + 16 - rem);
- if (new_buffer == NULL) {
+ if (!new_buffer) {
LOG_ERROR("Odd number of words to write and no memory for padding buffer");
return ERROR_FAIL;
}
/* if block write failed (no sufficient working area),
* we use normal (slow) single halfword accesses */
LOG_WARNING("Can't use block writes, falling back to single memory accesses");
- LOG_INFO("Plese wait ..."); /* it`s quite a long process */
+ LOG_INFO("Please wait ..."); /* it`s quite a long process */
/* chose between main bootflash and info bootflash */
if (niietcm4_info->bflash_info_remap)
/* write 16 bytes per try */
for (unsigned int i = 0; i < count; i += 16) {
/* current addr */
- LOG_INFO("%d byte of %d", i, count);
+ LOG_INFO("%u byte of %" PRIu32, i, count);
flash_addr = offset + i;
retval = target_write_u32(target, FMA, flash_addr);
if (retval != ERROR_OK)
}
free_buffer:
- if (new_buffer)
- free(new_buffer);
-
+ free(new_buffer);
return retval;
}
char info_bootflash_addr_str[64];
if (niietcm4_info->bflash_info_remap)
snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str),
- TARGET_ADDR_FMT " base adress", bank->base);
+ TARGET_ADDR_FMT " base address", bank->base);
else
snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str),
- "not mapped to global adress space");
+ "not mapped to global address space");
snprintf(niietcm4_info->chip_brief,
sizeof(niietcm4_info->chip_brief),
"\n"
"MEMORY CONFIGURATION\n"
"Bootflash :\n"
- " %d kB total\n"
- " %d pages %d kB each\n"
- " 0x%08x base adress\n"
+ " %" PRIu32 " kB total\n"
+ " %" PRIu32 " pages %" PRIu32 " kB each\n"
+ " 0x%08" PRIx32 " base address\n"
"%s"
"Info bootflash :\n"
- " %d kB total\n"
- " %d pages %d kB each\n"
+ " %" PRIu32 " kB total\n"
+ " %" PRIu32 " pages %" PRIu32 " kB each\n"
" %s\n"
"%s"
"Userflash :\n"
- " %d kB total\n"
- " %d pages %d B each\n"
- " %d bit cells\n"
- " not maped to global adress space\n"
+ " %" PRIu32 " kB total\n"
+ " %" PRIu32 " pages %" PRIu32 " B each\n"
+ " %" PRIu32 " bit cells\n"
+ " not mapped to global address space\n"
"Info userflash :\n"
- " %d B total\n"
- " %d pages of %d B each\n"
- " %d bit cells\n"
- " not maped to global adress space\n"
+ " %" PRIu32 " B total\n"
+ " %" PRIu32 " pages of %" PRIu32 " B each\n"
+ " %" PRIu32 " bit cells\n"
+ " not mapped to global address space\n"
"RAM :\n"
" 192 kB total\n"
- " 0x20000000 base adress\n"
+ " 0x20000000 base address\n"
"External memory :\n"
" 8/16 bit address space\n"
- " 0x%08x base adress\n"
+ " 0x%08" PRIx32 " base address\n"
"\n"
"INFOWORD STATUS\n"
"Bootflash info region remap :\n"
"External memory boot port :\n"
" %s\n"
"External memory boot pin :\n"
- " %d\n"
+ " %" PRIu32 "\n"
"External memory interface alternative function :\n"
- " %d\n"
+ " %" PRIu32 "\n"
"Option boot from external memory :\n"
" %s\n",
bflash_size/1024,
struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
struct target *target = bank->target;
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
+ free(bank->sectors);
+ bank->sectors = NULL;
+
uint32_t retval;
uint32_t chipid;
return niietcm4_probe(bank);
}
-static int get_niietcm4_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_niietcm4_info(struct flash_bank *bank, struct command_invocation *cmd)
{
struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- LOG_INFO("\nNIIET Cortex-M4F %s\n%s", niietcm4_info->chip_name, niietcm4_info->chip_brief);
- snprintf(buf, buf_size, " ");
-
+ command_print_sameline(cmd, "\nNIIET Cortex-M4F %s\n%s",
+ niietcm4_info->chip_name, niietcm4_info->chip_brief);
return ERROR_OK;
}
projects / fw / openocd / blobdiff