XCF (Xilinx platfrom flash) support.

[fw/openocd] / src / flash / nor / mrvlqspi.c

diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c
index a5cc1ca025c3077e9b1ab05f1eeaec329fbe4ae7..d79917058c666af610a49db7ebfd79f3e2f73ace 100644 (file)
--- a/src/flash/nor/mrvlqspi.c
+++ b/src/flash/nor/mrvlqspi.c
@@ -12,10 +12,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- *                                                                         *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
  /*
@@ -161,7 +158,7 @@ static int mrvlqspi_set_ss_state(struct flash_bank *bank, bool state, int timeou
                                mrvlqspi_get_reg(bank, CNTL), &regval);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("status: 0x%x", regval);
+               LOG_DEBUG("status: 0x%08" PRIx32, regval);
                if ((regval & XFER_RDY) == XFER_RDY)
                        break;
                if (timeout-- <= 0) {
@@ -216,7 +213,7 @@ static int mrvlqspi_stop_transfer(struct flash_bank *bank)
                                mrvlqspi_get_reg(bank, CNTL), &regval);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("status: 0x%x", regval);
+               LOG_DEBUG("status: 0x%08" PRIx32, regval);
                if ((regval & (XFER_RDY | WFIFO_EMPTY)) ==
                                        (XFER_RDY | WFIFO_EMPTY))
                        break;
@@ -245,7 +242,7 @@ static int mrvlqspi_stop_transfer(struct flash_bank *bank)
                                mrvlqspi_get_reg(bank, CONF), &regval);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("status: 0x%x", regval);
+               LOG_DEBUG("status: 0x%08" PRIx32, regval);
                if ((regval & XFER_START) == 0)
                        break;
                if (timeout-- <= 0) {
@@ -286,7 +283,7 @@ static int mrvlqspi_fifo_flush(struct flash_bank *bank, int timeout)
                                mrvlqspi_get_reg(bank, CONF), &val);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("status: 0x%x", val);
+               LOG_DEBUG("status: 0x%08" PRIX32, val);
                if ((val & FIFO_FLUSH) == 0)
                        break;
                if (timeout-- <= 0) {
@@ -310,7 +307,7 @@ static int mrvlqspi_read_byte(struct flash_bank *bank, uint8_t *data)
                                mrvlqspi_get_reg(bank, CNTL), &val);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("status: 0x%x", val);
+               LOG_DEBUG("status: 0x%08" PRIx32, val);
                if ((val & RFIFO_EMPTY) == 0)
                        break;
                usleep(10);
@@ -455,7 +452,8 @@ static int mrvlqspi_read_id(struct flash_bank *bank, uint32_t *id)
                        return retval;
        }
 
-       LOG_DEBUG("ID is 0x%x 0x%x 0x%x", id_buf[0], id_buf[1], id_buf[2]);
+       LOG_DEBUG("ID is 0x%02" PRIx8 " 0x%02" PRIx8 " 0x%02" PRIx8,
+                                       id_buf[0], id_buf[1], id_buf[2]);
        retval = mrvlqspi_set_ss_state(bank, QSPI_SS_DISABLE, QSPI_TIMEOUT);
        if (retval != ERROR_OK)
                return retval;
@@ -679,7 +677,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
                        " a working area > %zdB in order to write to SPIFI flash.",
                        sizeof(mrvlqspi_flash_write_code));
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(mrvlqspi_flash_write_code),
@@ -713,7 +711,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
        if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
                target_free_working_area(target, write_algorithm);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARM_MODE_THREAD;
@@ -854,11 +852,11 @@ static int mrvlqspi_probe(struct flash_bank *bank)
                }
 
        if (!mrvlqspi_info->dev) {
-               LOG_ERROR("Unknown flash device ID 0x%08x", id);
+               LOG_ERROR("Unknown flash device ID 0x%08" PRIx32, id);
                return ERROR_FAIL;
        }
 
-       LOG_INFO("Found flash device \'%s\' ID 0x%08x",
+       LOG_INFO("Found flash device \'%s\' ID 0x%08" PRIx32,
                mrvlqspi_info->dev->name, mrvlqspi_info->dev->device_id);
 
        /* Set correct size value */
@@ -918,7 +916,7 @@ int mrvlqspi_get_info(struct flash_bank *bank, char *buf, int buf_size)
        }
 
        snprintf(buf, buf_size, "\nQSPI flash information:\n"
-               "  Device \'%s\' ID 0x%08x\n",
+               "  Device \'%s\' ID 0x%08" PRIx32 "\n",
                mrvlqspi_info->dev->name, mrvlqspi_info->dev->device_id);
 
        return ERROR_OK;