/***************************************************************************
- * Copyright (C) 2011 by Mathias Kuester *
+ * Copyright (C) 2011 by Mathias Kuester *
* kesmtp@freenet.de *
* *
+ * Copyright (C) 2011 sleep(5) ltd *
+ * tomas@sleepfive.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include "helper/binarybuffer.h"
+struct kinetis_flash_bank {
+ uint32_t nvm_start;
+};
+
static int kinetis_get_master_bank(struct flash_bank *bank,
- struct flash_bank **master_bank)
+ struct flash_bank **master_bank)
{
*master_bank = get_flash_bank_by_name_noprobe(bank->name);
if (*master_bank == NULL) {
LOG_ERROR("master flash bank '%s' does not exist",
- (char *)bank->driver_priv);
+ (char *)bank->driver_priv);
return ERROR_FLASH_OPERATION_FAILED;
}
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
/* update the info we do not have */
bank->size = master_bank->size;
FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
{
- if (CMD_ARGC < 6) {
- LOG_ERROR("incomplete flash_bank kinetis configuration %d",
- CMD_ARGC);
- return ERROR_FLASH_OPERATION_FAILED;
- }
+ struct kinetis_flash_bank *bank_info;
+
+ if (CMD_ARGC < 6)
+ return ERROR_COMMAND_SYNTAX_ERROR;
LOG_INFO("add flash_bank kinetis %s", bank->name);
+ bank_info = malloc(sizeof(struct kinetis_flash_bank));
+
+ memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
+
+ bank->driver_priv = bank_info;
+
return ERROR_OK;
}
static int kinetis_protect(struct flash_bank *bank, int set, int first,
- int last)
+ int last)
{
int result;
struct flash_bank *master_bank;
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
LOG_WARNING("kinetis_protect not supported yet");
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
/* read protection register FTFL_FPROT */
result = target_read_memory(bank->target, 0x40020010, 1, 4, buffer);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
fprot = target_buffer_get_u32(bank->target, buffer);
}
static int kinetis_ftfl_command(struct flash_bank *bank, uint32_t w0,
- uint32_t w1, uint32_t w2)
+ uint32_t w1, uint32_t w2)
{
uint8_t buffer[12];
int result, i;
/* wait for done */
for (i = 0; i < 50; i++) {
result =
- target_read_memory(bank->target, 0x40020000, 1, 1, buffer);
+ target_read_memory(bank->target, 0x40020000, 1, 1, buffer);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
if (buffer[0] & 0x80)
break;
/* reset error flags */
buffer[0] = 0x30;
result =
- target_write_memory(bank->target, 0x40020000, 1, 1, buffer);
- if (result != ERROR_OK) {
+ target_write_memory(bank->target, 0x40020000, 1, 1, buffer);
+ if (result != ERROR_OK)
return result;
- }
}
target_buffer_set_u32(bank->target, buffer, w0);
result = target_write_memory(bank->target, 0x40020004, 4, 3, buffer);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
/* start command */
buffer[0] = 0x80;
result = target_write_memory(bank->target, 0x40020000, 1, 1, buffer);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
/* wait for done */
for (i = 0; i < 50; i++) {
result =
- target_read_memory(bank->target, 0x40020000, 1, 1, buffer);
+ target_read_memory(bank->target, 0x40020000, 1, 1, buffer);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
if (buffer[0] & 0x80)
break;
if (buffer[0] != 0x80) {
LOG_ERROR
- ("ftfl command failed FSTAT: %02X W0: %08X W1: %08X W2: %08X",
- buffer[0], w0, w1, w2);
+ ("ftfl command failed FSTAT: %02X W0: %08X W1: %08X W2: %08X",
+ buffer[0], w0, w1, w2);
return ERROR_FLASH_OPERATION_FAILED;
}
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
- if ((first > bank->num_sectors) || (last > bank->num_sectors)) {
+ if ((first > bank->num_sectors) || (last > bank->num_sectors))
return ERROR_FLASH_OPERATION_FAILED;
- }
for (i = first; i <= last; i++) {
/* set command and sector address */
if (first == 0) {
LOG_WARNING
- ("flash configuration field erased, please reset the device");
+ ("flash configuration field erased, please reset the device");
}
return ERROR_OK;
}
-static int kinetis_write(struct flash_bank *bank, uint8_t * buffer,
- uint32_t offset, uint32_t count)
+static int kinetis_write(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct flash_bank *master_bank;
- unsigned int i, result, fallback = 0;
+ unsigned int i, result, fallback = 0, nvm = 0;
uint8_t buf[8];
uint32_t wc, w0 = 0, w1 = 0, w2 = 0;
+ struct kinetis_flash_bank *kbank = (struct kinetis_flash_bank *)
+ bank->driver_priv;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
+
+ if (offset >= kbank->nvm_start)
+ nvm = 1;
+
+ if (!nvm && (offset + count) > kbank->nvm_start) {
+ /* we could flash this in two goes, but if the segment
+ spans across the pflash/nvm boundary, something is probably
+ not right.
+ */
+ LOG_ERROR("Segment spans NVM boundary");
+ return ERROR_FLASH_DST_OUT_OF_BANK;
}
- /* make flex ram available */
- w0 = (0x81 << 24) | 0x00ff0000;
+ if (nvm) {
+ LOG_DEBUG("flash write into NVM @%08X", offset);
- result = kinetis_ftfl_command(bank, w0, w1, w2);
+ /* make flex ram available */
+ w0 = (0x81 << 24) | 0x00ff0000;
- if (result != ERROR_OK) {
- return ERROR_FLASH_OPERATION_FAILED;
- }
+ result = kinetis_ftfl_command(bank, w0, w1, w2);
- /* check if ram ready */
- result = target_read_memory(bank->target, 0x40020001, 1, 1, buf);
+ if (result != ERROR_OK)
+ return ERROR_FLASH_OPERATION_FAILED;
- if (result != ERROR_OK) {
- return result;
- }
+ /* check if ram ready */
+ result = target_read_memory(bank->target, 0x40020001, 1, 1, buf);
- if (!(buf[0] & (1 << 1))) {
- /* fallback to longword write */
- fallback = 1;
+ if (result != ERROR_OK)
+ return result;
- LOG_WARNING
- ("ram not ready, fallback to slow longword write (FCNFG: %02X)",
- buf[0]);
+ if (!(buf[0] & (1 << 1))) {
+ /* fallback to longword write */
+ fallback = 1;
+
+ LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)",
+ buf[0]);
+ }
+ } else {
+ LOG_DEBUG("flash write into PFLASH @08%X", offset);
+ fallback = 1;
}
+
/* program section command */
if (fallback == 0) {
for (i = 0; i < count; i += (2 * 1024)) {
}
LOG_DEBUG("write section @ %08X with length %d",
- offset + i, wc * 4);
+ offset + i, wc * 4);
/* write data to flexram */
result =
- target_write_memory(bank->target, 0x14000000, 4, wc,
- buffer + i);
+ target_write_memory(bank->target, 0x14000000, 4, wc,
+ buffer + i);
if (result != ERROR_OK) {
LOG_ERROR("target_write_memory failed");
result = kinetis_ftfl_command(bank, w0, w1, w2);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return ERROR_FLASH_OPERATION_FAILED;
- }
}
}
/* program longword command */
result = kinetis_ftfl_command(bank, w0, w1, w2);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return ERROR_FLASH_OPERATION_FAILED;
- }
}
}
int result, i;
uint8_t buf[4];
uint32_t sim_sdid, sim_fcfg1, sim_fcfg2, offset = 0;
- uint32_t nvm_size, pf_size, flash_size, ee_size;
+ uint32_t nvm_size, pf_size, ee_size;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
result = target_read_memory(bank->target, 0x40048024, 1, 4, buf);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
sim_sdid = target_buffer_get_u32(bank->target, buf);
result = target_read_memory(bank->target, 0x4004804c, 1, 4, buf);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
sim_fcfg1 = target_buffer_get_u32(bank->target, buf);
result = target_read_memory(bank->target, 0x40048050, 1, 4, buf);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
sim_fcfg2 = target_buffer_get_u32(bank->target, buf);
LOG_DEBUG("SDID: %08X FCFG1: %08X FCFG2: %08X", sim_sdid, sim_fcfg1,
- sim_fcfg2);
+ sim_fcfg2);
switch ((sim_fcfg1 >> 28) & 0x0f) {
- case 0x07:
- nvm_size = 128 * 1024;
- break;
- case 0x09:
- case 0x0f:
- nvm_size = 256 * 1024;
- break;
- default:
- nvm_size = 0;
- break;
+ case 0x07:
+ nvm_size = 128 * 1024;
+ break;
+ case 0x09:
+ case 0x0f:
+ nvm_size = 256 * 1024;
+ break;
+ default:
+ nvm_size = 0;
+ break;
}
switch ((sim_fcfg1 >> 24) & 0x0f) {
- case 0x07:
- pf_size = 128 * 1024;
- break;
- case 0x09:
- pf_size = 256 * 1024;
- break;
- case 0x0b:
- case 0x0f:
- pf_size = 512 * 1024;
- break;
- default:
- pf_size = 0;
- break;
+ case 0x07:
+ pf_size = 128 * 1024;
+ break;
+ case 0x09:
+ pf_size = 256 * 1024;
+ break;
+ case 0x0b:
+ case 0x0f:
+ pf_size = 512 * 1024;
+ break;
+ default:
+ pf_size = 0;
+ break;
}
- /* pf_size is the total size */
- flash_size = pf_size - nvm_size;
-
switch ((sim_fcfg1 >> 16) & 0x0f) {
- case 0x02:
- ee_size = 4 * 1024;
- break;
- case 0x03:
- ee_size = 2 * 1024;
- break;
- case 0x04:
- ee_size = 1 * 1024;
- break;
- case 0x05:
- ee_size = 512;
- break;
- case 0x06:
- ee_size = 256;
- break;
- case 0x07:
- ee_size = 128;
- break;
- case 0x08:
- ee_size = 64;
- break;
- case 0x09:
- ee_size = 32;
- break;
- default:
- ee_size = 0;
- break;
+ case 0x02:
+ ee_size = 4 * 1024;
+ break;
+ case 0x03:
+ ee_size = 2 * 1024;
+ break;
+ case 0x04:
+ ee_size = 1 * 1024;
+ break;
+ case 0x05:
+ ee_size = 512;
+ break;
+ case 0x06:
+ ee_size = 256;
+ break;
+ case 0x07:
+ ee_size = 128;
+ break;
+ case 0x08:
+ ee_size = 64;
+ break;
+ case 0x09:
+ ee_size = 32;
+ break;
+ default:
+ ee_size = 0;
+ break;
}
+ ((struct kinetis_flash_bank *) bank->driver_priv)->nvm_start =
+ pf_size - nvm_size;
+
LOG_DEBUG("NVM: %d PF: %d EE: %d BL1: %d", nvm_size, pf_size, ee_size,
- (sim_fcfg2 >> 23) & 1);
+ (sim_fcfg2 >> 23) & 1);
- if (flash_size != bank->size) {
- LOG_WARNING("flash size is different %d != %d", flash_size,
- bank->size);
+ if (pf_size != bank->size) {
+ LOG_WARNING("flash size is different %d != %d", pf_size,
+ bank->size);
}
bank->num_sectors = bank->size / (2 * 1024);
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
snprintf(buf, buf_size,
- "%s driver for flash bank %s at 0x%8.8" PRIx32 "",
- bank->driver->name, master_bank->name, master_bank->base);
+ "%s driver for flash bank %s at 0x%8.8" PRIx32 "",
+ bank->driver->name, master_bank->name, master_bank->base);
return ERROR_OK;
}
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
return ERROR_OK;
}
static int kinetis_flash_read(struct flash_bank *bank,
- uint8_t * buffer, uint32_t offset, uint32_t count)
+ uint8_t *buffer, uint32_t offset, uint32_t count)
{
int result;
struct flash_bank *master_bank;
result = kinetis_get_master_bank(bank, &master_bank);
- if (result != ERROR_OK) {
+ if (result != ERROR_OK)
return result;
- }
return ERROR_OK;
}
projects / fw / openocd / blobdiff