FS_NO_CMD_BLOCKSTAT = 0x40,
FS_WIDTH_256BIT = 0x80,
+ FS_ECC = 0x100,
} flash_support;
enum {
static bool allow_fcf_writes;
static uint8_t fcf_fopt = 0xff;
+static bool fcf_fopt_configured;
static bool create_banks;
-struct flash_driver kinetis_flash;
+const struct flash_driver kinetis_flash;
static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count);
static int kinetis_probe_chip(struct kinetis_chip *k_chip);
}
+static void kinetis_free_driver_priv(struct flash_bank *bank)
+{
+ struct kinetis_flash_bank *k_bank = bank->driver_priv;
+ if (k_bank == NULL)
+ return;
+
+ struct kinetis_chip *k_chip = k_bank->k_chip;
+ if (k_chip == NULL)
+ return;
+
+ k_chip->num_banks--;
+ if (k_chip->num_banks == 0)
+ free(k_chip);
+}
+
+
static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
{
unsigned bank_idx;
unsigned num_blocks;
struct kinetis_flash_bank *k_bank;
struct flash_bank *bank;
- char base_name[80], name[80], num[4];
+ char base_name[69], name[80], num[4];
char *class, *p;
num_blocks = k_chip->num_pflash_blocks + k_chip->num_nvm_blocks;
bank = k_chip->banks[0].bank;
if (bank && bank->name) {
- strncpy(base_name, bank->name, sizeof(base_name));
+ strncpy(base_name, bank->name, sizeof(base_name) - 1);
+ base_name[sizeof(base_name) - 1] = '\0';
p = strstr(base_name, ".pflash");
if (p) {
*p = '\0';
if (k_chip->num_pflash_blocks > 1) {
/* rename first bank if numbering is needed */
snprintf(name, sizeof(name), "%s.pflash0", base_name);
- free((void *)bank->name);
+ free(bank->name);
bank->name = strdup(name);
}
}
} else {
- strncpy(base_name, target_name(k_chip->target), sizeof(base_name));
+ strncpy(base_name, target_name(k_chip->target), sizeof(base_name) - 1);
+ base_name[sizeof(base_name) - 1] = '\0';
p = strstr(base_name, ".cpu");
if (p)
*p = '\0';
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
- init_reg_param(®_params[0], "r0", 32, PARAM_IN);
+ init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
buf_set_u32(reg_params[0].value, 0, 32, wdog_base);
retval = target_run_algorithm(target, 0, NULL, 1, reg_params,
kinetis_auto_probe(bank_iter);
+ assert(bank_iter->prot_blocks);
+
if (k_bank->flash_class == FC_PFLASH) {
for (i = 0; i < bank_iter->num_prot_blocks; i++) {
if (bank_iter->prot_blocks[i].is_protected == 1)
result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer_aligned);
- LOG_DEBUG("section @ %08" PRIx32 " aligned begin %" PRIu32 ", end %" PRIu32,
+ LOG_DEBUG("section @ " TARGET_ADDR_FMT " aligned begin %" PRIu32
+ ", end %" PRIu32,
bank->base + offset, align_begin, align_end);
} else
result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer);
- LOG_DEBUG("write section @ %08" PRIx32 " with length %" PRIu32 " bytes",
+ LOG_DEBUG("write section @ " TARGET_ADDR_FMT " with length %" PRIu32
+ " bytes",
bank->base + offset, size);
if (result != ERROR_OK) {
0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) {
- LOG_ERROR("Error writing section at %08" PRIx32, bank->base + offset);
+ LOG_ERROR("Error writing section at " TARGET_ADDR_FMT,
+ bank->base + offset);
break;
}
if (ftfx_fstat & 0x01) {
- LOG_ERROR("Flash write error at %08" PRIx32, bank->base + offset);
+ LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
+ bank->base + offset);
if (k_bank->prog_base == 0 && offset == FCF_ADDRESS + FCF_SIZE
&& (k_chip->flash_support & FS_WIDTH_256BIT)) {
LOG_ERROR("Flash write immediately after the end of Flash Config Field shows error");
}
}
- LOG_DEBUG("flash write @ %08" PRIx32, bank->base + offset);
+ LOG_DEBUG("flash write @ " TARGET_ADDR_FMT, bank->base + offset);
if (fallback == 0) {
/* program section command */
0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) {
- LOG_ERROR("Error writing longword at %08" PRIx32, bank->base + offset);
+ LOG_ERROR("Error writing longword at " TARGET_ADDR_FMT,
+ bank->base + offset);
break;
}
if (ftfx_fstat & 0x01)
- LOG_ERROR("Flash write error at %08" PRIx32, bank->base + offset);
+ LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
+ bank->base + offset);
buffer += 4;
offset += 4;
{
int result;
bool set_fcf = false;
+ bool fcf_in_data_valid = false;
int sect = 0;
struct kinetis_flash_bank *k_bank = bank->driver_priv;
struct kinetis_chip *k_chip = k_bank->k_chip;
+ uint8_t fcf_buffer[FCF_SIZE];
+ uint8_t fcf_current[FCF_SIZE];
+ uint8_t fcf_in_data[FCF_SIZE];
result = kinetis_check_run_mode(k_chip);
if (result != ERROR_OK)
}
if (set_fcf) {
- uint8_t fcf_buffer[FCF_SIZE];
- uint8_t fcf_current[FCF_SIZE];
-
kinetis_fill_fcf(bank, fcf_buffer);
+ fcf_in_data_valid = offset <= FCF_ADDRESS
+ && offset + count >= FCF_ADDRESS + FCF_SIZE;
+ if (fcf_in_data_valid) {
+ memcpy(fcf_in_data, buffer + FCF_ADDRESS - offset, FCF_SIZE);
+ if (memcmp(fcf_in_data + FCF_FPROT, fcf_buffer, 4)) {
+ fcf_in_data_valid = false;
+ LOG_INFO("Flash protection requested in programmed file differs from current setting.");
+ }
+ if (fcf_in_data[FCF_FDPROT] != fcf_buffer[FCF_FDPROT]) {
+ fcf_in_data_valid = false;
+ LOG_INFO("Data flash protection requested in programmed file differs from current setting.");
+ }
+ if ((fcf_in_data[FCF_FSEC] & 3) != 2) {
+ fcf_in_data_valid = false;
+ LOG_INFO("Device security requested in programmed file!");
+ } else if (k_chip->flash_support & FS_ECC
+ && fcf_in_data[FCF_FSEC] != fcf_buffer[FCF_FSEC]) {
+ fcf_in_data_valid = false;
+ LOG_INFO("Strange unsecure mode 0x%02" PRIx8
+ "requested in programmed file!",
+ fcf_in_data[FCF_FSEC]);
+ }
+ if ((k_chip->flash_support & FS_ECC || fcf_fopt_configured)
+ && fcf_in_data[FCF_FOPT] != fcf_fopt) {
+ fcf_in_data_valid = false;
+ LOG_INFO("FOPT requested in programmed file differs from current setting.");
+ }
+ if (!fcf_in_data_valid)
+ LOG_INFO("Expect verify errors at FCF (0x408-0x40f).");
+ }
+ }
+
+ if (set_fcf && !fcf_in_data_valid) {
if (offset < FCF_ADDRESS) {
/* write part preceding FCF */
result = kinetis_write_inner(bank, buffer, offset, FCF_ADDRESS - offset);
}
return result;
- } else
+ } else {
/* no FCF fiddling, normal write */
return kinetis_write_inner(bank, buffer, offset, count);
+ }
}
unsigned cpu_mhz = 120;
unsigned idx;
bool use_nvm_marking = false;
- char flash_marking[11], nvm_marking[2];
+ char flash_marking[12], nvm_marking[2];
char name[40];
k_chip->probed = false;
k_chip->nvm_sector_size = 4<<10;
k_chip->max_flash_prog_size = 1<<10;
num_blocks = 4;
- k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
+ k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_ECC;
cpu_mhz = 180;
break;
+ case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX7:
+ /* K27FN2M0 */
+ case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX8:
+ /* K28FN2M0 */
+ k_chip->pflash_sector_size = 4<<10;
+ k_chip->max_flash_prog_size = 1<<10;
+ num_blocks = 4;
+ k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_ECC;
+ cpu_mhz = 150;
+ break;
+
case KINETIS_SDID_FAMILYID_K8X | KINETIS_SDID_SUBFAMID_KX0:
case KINETIS_SDID_FAMILYID_K8X | KINETIS_SDID_SUBFAMID_KX1:
case KINETIS_SDID_FAMILYID_K8X | KINETIS_SDID_SUBFAMID_KX2:
k_chip->max_flash_prog_size = 1<<10;
num_blocks = 1;
maxaddr_shift = 14;
- k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_WIDTH_256BIT;
+ k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_WIDTH_256BIT | FS_ECC;
k_chip->pflash_base = 0x10000000;
k_chip->progr_accel_ram = 0x18000000;
cpu_mhz = 240;
unsigned num_blocks, first_nvm_bank;
uint32_t size_k;
struct kinetis_flash_bank *k_bank = bank->driver_priv;
- struct kinetis_chip *k_chip = k_bank->k_chip;
+ struct kinetis_chip *k_chip;
+
+ assert(k_bank);
+ k_chip = k_bank->k_chip;
k_bank->probed = false;
uint32_t size_k = bank->size / 1024;
snprintf(buf, buf_size,
- "%s %s: %" PRIu32 "k %s bank %s at 0x%08" PRIx32,
+ "%s %s: %" PRIu32 "k %s bank %s at " TARGET_ADDR_FMT,
bank->driver->name, k_chip->name,
size_k, bank_class_names[k_bank->flash_class],
bank->name, bank->base);
flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
switch (flex_nvm_partition_code) {
case 0:
- command_print(CMD_CTX, "No EEPROM backup, data flash only");
+ command_print(CMD, "No EEPROM backup, data flash only");
break;
case 1:
case 2:
case 4:
case 5:
case 6:
- command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
+ command_print(CMD, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
break;
case 8:
- command_print(CMD_CTX, "No data flash, EEPROM backup only");
+ command_print(CMD, "No data flash, EEPROM backup only");
break;
case 0x9:
case 0xA:
case 0xC:
case 0xD:
case 0xE:
- command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
+ command_print(CMD, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
break;
case 0xf:
- command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
+ command_print(CMD, "No EEPROM backup, data flash only (DEPART not set)");
break;
default:
- command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
+ command_print(CMD, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
}
return ERROR_OK;
if (result != ERROR_OK)
return result;
- command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
+ command_print(CMD, "FlexNVM partition set. Please reset MCU.");
if (k_chip) {
first_nvm_bank = k_chip->num_pflash_blocks;
k_chip->probed = false;
}
- command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
+ command_print(CMD, "FlexNVM banks will be re-probed to set new data flash size.");
return ERROR_OK;
}
}
if (allow_fcf_writes) {
- command_print(CMD_CTX, "Arbitrary Flash Configuration Field writes enabled.");
- command_print(CMD_CTX, "Protection info writes to FCF disabled.");
+ command_print(CMD, "Arbitrary Flash Configuration Field writes enabled.");
+ command_print(CMD, "Protection info writes to FCF disabled.");
LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
} else {
- command_print(CMD_CTX, "Protection info writes to Flash Configuration Field enabled.");
- command_print(CMD_CTX, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
+ command_print(CMD, "Protection info writes to Flash Configuration Field enabled.");
+ command_print(CMD, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
}
return ERROR_OK;
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC == 1)
+ if (CMD_ARGC == 1) {
fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0);
- else
- command_print(CMD_CTX, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
+ fcf_fopt_configured = true;
+ } else {
+ command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
+ }
return ERROR_OK;
}
.usage = "",
.handler = kinetis_mdm_mass_erase,
},
- { .name = "reset",
+ {
+ .name = "reset",
.mode = COMMAND_EXEC,
.help = "Issue a reset via the MDM-AP",
.usage = "",
.mode = COMMAND_CONFIG,
.help = "Driver creates additional banks if device with two/four flash blocks is probed",
.handler = kinetis_create_banks_handler,
+ .usage = "",
},
COMMAND_REGISTRATION_DONE
};
-struct flash_driver kinetis_flash = {
+const struct flash_driver kinetis_flash = {
.name = "kinetis",
.commands = kinetis_command_handler,
.flash_bank_command = kinetis_flash_bank_command,
.erase_check = kinetis_blank_check,
.protect_check = kinetis_protect_check,
.info = kinetis_info,
+ .free_driver_priv = kinetis_free_driver_priv,
};
projects / fw / openocd / blobdiff